X-Git-Url: http://git.ipfire.org/?a=blobdiff_plain;f=include%2Fconfigs%2Fat91cap9adk.h;h=27f8fd1a16fb598f2ea1f525ec7ef5d4038457dd;hb=84efbf4d144ff8aaed3cca036aebb1fe69eff3f4;hp=342ce2a649d67640876a548246cefefaba2f3e53;hpb=912810eeca90eedd1503f5e883f3a8da39d7ff89;p=people%2Fms%2Fu-boot.git diff --git a/include/configs/at91cap9adk.h b/include/configs/at91cap9adk.h index 342ce2a649..27f8fd1a16 100644 --- a/include/configs/at91cap9adk.h +++ b/include/configs/at91cap9adk.h @@ -28,16 +28,13 @@ #define __CONFIG_H /* ARM asynchronous clock */ -#define AT91_CPU_NAME "AT91CAP9" -#define AT91_MAIN_CLOCK 200000000 /* from 12 MHz crystal */ -#define AT91_MASTER_CLOCK 100000000 /* peripheral = main / 2 */ -#define CFG_HZ 1000000 /* 1us resolution */ - -#define AT91_SLOW_CLOCK 32768 /* slow clock */ +#define AT91_MAIN_CLOCK 12000000 /* 12 MHz crystal */ +#define CONFIG_SYS_HZ 1000 #define CONFIG_ARM926EJS 1 /* This is an ARM926EJS Core */ #define CONFIG_AT91CAP9 1 /* It's an Atmel AT91CAP9 SoC */ #define CONFIG_AT91CAP9ADK 1 /* on an AT91CAP9ADK Board */ +#define CONFIG_ARCH_CPU_INIT #undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */ #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ @@ -63,10 +60,16 @@ #undef LCD_TEST_PATTERN #define CONFIG_LCD_INFO 1 #define CONFIG_LCD_INFO_BELOW_LOGO 1 -#define CFG_WHITE_ON_BLACK 1 +#define CONFIG_SYS_WHITE_ON_BLACK 1 #define CONFIG_ATMEL_LCD 1 #define CONFIG_ATMEL_LCD_BGR555 1 -#define CFG_CONSOLE_IS_IN_ENV 1 +#define CONFIG_SYS_CONSOLE_IS_IN_ENV 1 + +/* LED */ +#define CONFIG_AT91_LED +#define CONFIG_RED_LED AT91_PIN_PC29 /* this is the power led */ +#define CONFIG_GREEN_LED AT91_PIN_PA10 /* this is the user1 led */ +#define CONFIG_YELLOW_LED AT91_PIN_PA11 /* this is the user1 led */ #define CONFIG_BOOTDELAY 3 @@ -83,10 +86,10 @@ */ #include #undef CONFIG_CMD_BDI -#undef CONFIG_CMD_IMI -#undef CONFIG_CMD_AUTOSCRIPT #undef CONFIG_CMD_FPGA +#undef CONFIG_CMD_IMI #undef CONFIG_CMD_LOADS +#undef CONFIG_CMD_SOURCE #define CONFIG_CMD_PING 1 #define CONFIG_CMD_DHCP 1 @@ -99,27 +102,38 @@ #define PHYS_SDRAM_SIZE 0x04000000 /* 64 megs */ /* DataFlash */ +#define CONFIG_ATMEL_DATAFLASH_SPI #define CONFIG_HAS_DATAFLASH 1 -#define CFG_SPI_WRITE_TOUT (5*CFG_HZ) -#define CFG_MAX_DATAFLASH_BANKS 1 -#define CFG_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000 /* CS0 */ +#define CONFIG_SYS_SPI_WRITE_TOUT (5*CONFIG_SYS_HZ) +#define CONFIG_SYS_MAX_DATAFLASH_BANKS 1 +#define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000 /* CS0 */ #define AT91_SPI_CLK 15000000 #define DATAFLASH_TCSS (0x1a << 16) #define DATAFLASH_TCHS (0x1 << 24) /* NOR flash */ -#define CFG_FLASH_CFI 1 -#define CFG_FLASH_CFI_DRIVER 1 +#define CONFIG_SYS_FLASH_CFI 1 +#define CONFIG_FLASH_CFI_DRIVER 1 #define PHYS_FLASH_1 0x10000000 -#define CFG_FLASH_BASE PHYS_FLASH_1 -#define CFG_MAX_FLASH_SECT 256 -#define CFG_MAX_FLASH_BANKS 1 +#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1 +#define CONFIG_SYS_MAX_FLASH_SECT 256 +#define CONFIG_SYS_MAX_FLASH_BANKS 1 +/* our ALE is AD21 */ +#define CONFIG_SYS_NAND_MASK_ALE (1 << 21) +/* our CLE is AD22 */ +#define CONFIG_SYS_NAND_MASK_CLE (1 << 22) +#define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PD15 /* NAND flash */ -#define NAND_MAX_CHIPS 1 -#define CFG_MAX_NAND_DEVICE 1 -#define CFG_NAND_BASE 0x40000000 -#define CFG_NAND_DBW_8 1 +#ifdef CONFIG_CMD_NAND +#define CONFIG_NAND_ATMEL +#define CONFIG_SYS_MAX_NAND_DEVICE 1 +#define CONFIG_SYS_NAND_BASE 0x40000000 +#define CONFIG_SYS_NAND_DBW_8 1 +#endif + +#define CONFIG_SYS_64BIT_VSPRINTF /* needed for nand_util.c */ +#endif /* Ethernet */ #define CONFIG_MACB 1 @@ -129,30 +143,32 @@ #define CONFIG_RESET_PHY_R 1 /* USB */ +#define CONFIG_USB_ATMEL #define CONFIG_USB_OHCI_NEW 1 -#define LITTLEENDIAN 1 #define CONFIG_DOS_PARTITION 1 -#define CFG_USB_OHCI_CPU_INIT 1 -#define CFG_USB_OHCI_REGS_BASE 0x00700000 /* AT91_BASE_UHP */ -#define CFG_USB_OHCI_SLOT_NAME "at91cap9" -#define CFG_USB_OHCI_MAX_ROOT_PORTS 2 +#define CONFIG_SYS_USB_OHCI_CPU_INIT 1 +#define CONFIG_SYS_USB_OHCI_REGS_BASE 0x00700000 /* AT91_BASE_UHP */ +#define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91cap9" +#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2 +#define CONFIG_USB_STORAGE 1 +#define CONFIG_CMD_FAT 1 -#define CFG_LOAD_ADDR 0x72000000 /* load address */ +#define CONFIG_SYS_LOAD_ADDR 0x72000000 /* load address */ -#define CFG_MEMTEST_START PHYS_SDRAM -#define CFG_MEMTEST_END 0x73e00000 +#define CONFIG_SYS_MEMTEST_START PHYS_SDRAM +#define CONFIG_SYS_MEMTEST_END 0x73e00000 -#define CFG_USE_DATAFLASH 1 -#undef CFG_USE_NORFLASH +#define CONFIG_SYS_USE_DATAFLASH 1 +#undef CONFIG_SYS_USE_NORFLASH -#ifdef CFG_USE_DATAFLASH +#ifdef CONFIG_SYS_USE_DATAFLASH /* bootstrap + u-boot + env + linux in dataflash */ -#define CFG_ENV_IS_IN_DATAFLASH 1 -#define CFG_MONITOR_BASE (CFG_DATAFLASH_LOGIC_ADDR_CS0 + 0x8400) -#define CFG_ENV_OFFSET 0x4200 -#define CFG_ENV_ADDR (CFG_DATAFLASH_LOGIC_ADDR_CS0 + CFG_ENV_OFFSET) -#define CFG_ENV_SIZE 0x4200 +#define CONFIG_ENV_IS_IN_DATAFLASH 1 +#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + 0x8400) +#define CONFIG_ENV_OFFSET 0x4200 +#define CONFIG_ENV_ADDR (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + CONFIG_ENV_OFFSET) +#define CONFIG_ENV_SIZE 0x4200 #define CONFIG_BOOTCOMMAND "cp.b 0xC0042000 0x72000000 0x210000; bootm" #define CONFIG_BOOTARGS "console=ttyS0,115200 " \ "root=/dev/mtdblock1 " \ @@ -163,11 +179,11 @@ #else /* bootstrap + u-boot + env + linux in norflash */ -#define CFG_ENV_IS_IN_FLASH 1 -#define CFG_MONITOR_BASE (PHYS_FLASH_1 + 0x8000) -#define CFG_ENV_OFFSET 0x4000 -#define CFG_ENV_ADDR (PHYS_FLASH_1 + CFG_ENV_OFFSET) -#define CFG_ENV_SIZE 0x4000 +#define CONFIG_ENV_IS_IN_FLASH 1 +#define CONFIG_SYS_MONITOR_BASE (PHYS_FLASH_1 + 0x8000) +#define CONFIG_ENV_OFFSET 0x4000 +#define CONFIG_ENV_ADDR (PHYS_FLASH_1 + CONFIG_ENV_OFFSET) +#define CONFIG_ENV_SIZE 0x4000 #define CONFIG_BOOTCOMMAND "cp.b 0x10040000 0x72000000 0x200000; bootm" #define CONFIG_BOOTARGS "console=ttyS0,115200 " \ "root=/dev/mtdblock4 " \ @@ -179,21 +195,20 @@ #endif #define CONFIG_BAUDRATE 115200 -#define CFG_BAUDRATE_TABLE {115200 , 19200, 38400, 57600, 9600 } +#define CONFIG_SYS_BAUDRATE_TABLE {115200 , 19200, 38400, 57600, 9600 } -#define CFG_PROMPT "U-Boot> " -#define CFG_CBSIZE 256 -#define CFG_MAXARGS 16 -#define CFG_PBSIZE (CFG_CBSIZE + sizeof(CFG_PROMPT) + 16) -#define CFG_LONGHELP 1 +#define CONFIG_SYS_PROMPT "U-Boot> " +#define CONFIG_SYS_CBSIZE 256 +#define CONFIG_SYS_MAXARGS 16 +#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) +#define CONFIG_SYS_LONGHELP 1 #define CONFIG_CMDLINE_EDITING 1 -#define ROUND(A, B) (((A) + (B)) & ~((B) - 1)) /* * Size of malloc() pool */ -#define CFG_MALLOC_LEN ROUND(CFG_ENV_SIZE + 128*1024, 0x1000) -#define CFG_GBL_DATA_SIZE 128 /* 128 bytes for initial data */ +#define CONFIG_SYS_MALLOC_LEN ROUND(CONFIG_ENV_SIZE + 128*1024, 0x1000) +#define CONFIG_SYS_GBL_DATA_SIZE 128 /* 128 bytes for initial data */ #define CONFIG_STACKSIZE (32*1024) /* regular stack */