X-Git-Url: http://git.ipfire.org/?a=blobdiff_plain;f=include%2Fconfigs%2Fdlvision-10g.h;h=2a04949ed662ab46d68b9f8ac16e2f4a3d885584;hb=a1dc980d88a5c9c2b99251c8d8299b0c8948de73;hp=0f67595903d14f5bd156476ce0fe423e9f961bb9;hpb=0d3f732fd2ba679b4498541f075d1b1bdbea3935;p=people%2Fms%2Fu-boot.git

diff --git a/include/configs/dlvision-10g.h b/include/configs/dlvision-10g.h
index 0f67595903..2a04949ed6 100644
--- a/include/configs/dlvision-10g.h
+++ b/include/configs/dlvision-10g.h
@@ -17,30 +17,20 @@
  * Include common defines/options for all AMCC eval boards
  */
 #define CONFIG_HOSTNAME		dlvsion-10g
-#define CONFIG_IDENT_STRING	" dlvision-10g 0.06"
 #include "amcc-common.h"
 
-#define CONFIG_BOARD_EARLY_INIT_F
 #define CONFIG_BOARD_EARLY_INIT_R
 #define CONFIG_MISC_INIT_R
 #define CONFIG_LAST_STAGE_INIT
-#define CONFIG_SYS_GENERIC_BOARD
 
 #define CONFIG_SYS_CLK_FREQ	33333333 /* external frequency to pll   */
 
-#undef CONFIG_ZERO_BOOTDELAY_CHECK     /* ignore keypress on bootdelay==0 */
-
 /*
  * Configure PLL
  */
 #define PLLMR0_DEFAULT PLLMR0_266_133_66
 #define PLLMR1_DEFAULT PLLMR1_266_133_66
 
-/* new uImage format support */
-#define CONFIG_FIT
-#define CONFIG_FIT_VERBOSE	/* enable fit_format_{error,warning}() */
-#define CONFIG_FIT_DISABLE_SHA256
-
 #define CONFIG_ENV_IS_IN_FLASH	/* use FLASH for environment vars */
 
 /*
@@ -64,14 +54,7 @@
 /*
  * Commands additional to the ones defined in amcc-common.h
  */
-#define CONFIG_CMD_DTT
-#undef CONFIG_CMD_DHCP
-#undef CONFIG_CMD_DIAG
-#undef CONFIG_CMD_EEPROM
-#undef CONFIG_CMD_ELF
-#undef CONFIG_CMD_I2C
 #undef CONFIG_CMD_IRQ
-#undef CONFIG_CMD_NFS
 
 /*
  * SDRAM configuration (please see cpu/ppc/sdram.[ch])
@@ -108,26 +91,25 @@
 #define CONFIG_SYS_I2C_PPC4XX_SLAVE_0		0x7F
 
 #define CONFIG_SYS_I2C_IHS
+#define CONFIG_SYS_I2C_IHS_DUAL
 #define CONFIG_SYS_I2C_IHS_CH0
 #define CONFIG_SYS_I2C_IHS_SPEED_0		50000
 #define CONFIG_SYS_I2C_IHS_SLAVE_0		0x7F
+#define CONFIG_SYS_I2C_IHS_SPEED_0_1		50000
+#define CONFIG_SYS_I2C_IHS_SLAVE_0_1		0x7F
 #define CONFIG_SYS_I2C_IHS_CH1
 #define CONFIG_SYS_I2C_IHS_SPEED_1		50000
 #define CONFIG_SYS_I2C_IHS_SLAVE_1		0x7F
+#define CONFIG_SYS_I2C_IHS_SPEED_1_1		50000
+#define CONFIG_SYS_I2C_IHS_SLAVE_1_1		0x7F
 
-#define CONFIG_SYS_SPD_BUS_NUM		2
+#define CONFIG_SYS_SPD_BUS_NUM		4
 
 /* Temp sensor/hwmon/dtt */
-#define CONFIG_SYS_DTT_BUS_NUM	2
-#define CONFIG_DTT_LM63		1	/* National LM63	*/
-#define CONFIG_DTT_SENSORS	{ 0x4c, 0x4e, 0x18 } /* Sensor addresses */
-#define CONFIG_DTT_PWM_LOOKUPTABLE	\
-		{ { 46, 10 }, { 48, 14 }, { 50, 19 }, { 52, 23 },\
-		  { 54, 27 }, { 56, 31 }, { 58, 36 }, { 60, 40 } }
-#define CONFIG_DTT_TACH_LIMIT	0xa10
 
-#define CONFIG_SYS_ICS8N3QV01_I2C	{0, 1}
-#define CONFIG_SYS_SIL1178_I2C		{0, 1}
+#define CONFIG_SYS_ICS8N3QV01_I2C	{1, 3}
+#define CONFIG_SYS_SIL1178_I2C		{0, 2}
+#define CONFIG_SYS_DP501_I2C		{0, 2}
 
 /* EBC peripherals */
 
@@ -237,10 +219,10 @@
 #define CONFIG_SYS_OCM_DATA_ADDR	0xF8000000
 #define CONFIG_SYS_OCM_DATA_SIZE	0x1000
 #define CONFIG_SYS_INIT_RAM_ADDR	CONFIG_SYS_OCM_DATA_ADDR /* in SDRAM */
-#define CONFIG_SYS_INIT_RAM_END	CONFIG_SYS_OCM_DATA_SIZE /* End of used area */
+#define CONFIG_SYS_INIT_RAM_SIZE	CONFIG_SYS_OCM_DATA_SIZE
 
 #define CONFIG_SYS_GBL_DATA_OFFSET \
-	(CONFIG_SYS_INIT_RAM_END - GENERATED_GBL_DATA_SIZE)
+	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
 #define CONFIG_SYS_INIT_SP_OFFSET	CONFIG_SYS_GBL_DATA_OFFSET
 
 /*
@@ -330,5 +312,7 @@
  */
 #define CONFIG_SYS_MPC92469AC
 #define CONFIG_SYS_OSD_SCREENS		CONFIG_SYS_FPGA_COUNT
+#define CONFIG_SYS_DP501_DIFFERENTIAL
+#define CONFIG_SYS_DP501_VCAPCTRL0	0x01 /* DDR mode 0, DE for H/VSYNC */
 
 #endif	/* __CONFIG_H */