X-Git-Url: http://git.ipfire.org/?a=blobdiff_plain;f=include%2Fconfigs%2Fedminiv2.h;h=99d16b06c094675bd619ea0b7ff470956e179c98;hb=89cb2b5f8be4f6d04bd87220aa8f72eb0850edc4;hp=43e5e870f009df4f48807d93a305569e5028fe3f;hpb=b18815752f3d6db27877606e4e069e3f6cfe3a19;p=people%2Fms%2Fu-boot.git diff --git a/include/configs/edminiv2.h b/include/configs/edminiv2.h index 43e5e870f0..99d16b06c0 100644 --- a/include/configs/edminiv2.h +++ b/include/configs/edminiv2.h @@ -1,33 +1,39 @@ /* - * Copyright (C) 2010 Albert ARIBAUD + * Copyright (C) 2010 Albert ARIBAUD * * Based on original Kirkwood support which is * (C) Copyright 2009 * Marvell Semiconductor * Written-by: Prafulla Wadaskar * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, - * MA 02110-1301 USA + * SPDX-License-Identifier: GPL-2.0+ */ #ifndef _CONFIG_EDMINIV2_H #define _CONFIG_EDMINIV2_H +/* + * SPL + */ + +#define CONFIG_SPL_FRAMEWORK +#define CONFIG_SPL_LIBGENERIC_SUPPORT +#define CONFIG_SPL_LIBCOMMON_SUPPORT +#define CONFIG_SPL_SERIAL_SUPPORT +#define CONFIG_SPL_NOR_SUPPORT +#define CONFIG_SPL_TEXT_BASE 0xffff0000 +#define CONFIG_SPL_MAX_SIZE 0x0000fff0 +#define CONFIG_SPL_STACK 0x00020000 +#define CONFIG_SPL_BSS_START_ADDR 0x00020000 +#define CONFIG_SPL_BSS_MAX_SIZE 0x0001ffff +#define CONFIG_SYS_SPL_MALLOC_START 0x00040000 +#define CONFIG_SYS_SPL_MALLOC_SIZE 0x0001ffff +#define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/orion5x/u-boot-spl.lds" +#define CONFIG_SPL_BOARD_INIT +#define CONFIG_SYS_UBOOT_BASE 0xfff90000 +#define CONFIG_SYS_UBOOT_START 0x00800000 +#define CONFIG_SYS_TEXT_BASE 0x00800000 + /* * Version number information */ @@ -39,18 +45,15 @@ */ #define CONFIG_MARVELL 1 -#define CONFIG_ARM926EJS 1 /* Basic Architecture */ #define CONFIG_FEROCEON 1 /* CPU Core subversion */ -#define CONFIG_ORION5X 1 /* SOC Family Name */ #define CONFIG_88F5182 1 /* SOC Name */ #define CONFIG_MACH_EDMINIV2 1 /* Machine type */ +#include /* * CLKs configurations */ -#define CONFIG_SYS_HZ 1000 - /* * Board-specific values for Orion5x MPP low level init: * - MPPs 12 to 15 are SATA LEDs (mode 5) @@ -68,19 +71,23 @@ * - GPIO16 is Power LED control (0 = on, 1 = off) * - GPIO17 is Power LED source select (0 = CPLD, 1 = GPIO16) * - GPIO18 is Power Button status (0 = Released, 1 = Pressed) - * - Last GPIO is 26, further bits are supposed to be 0. + * - GPIO19 is SATA disk power toggle (toggles on 0-to-1) + * - GPIO22 is SATA disk power status () + * - GPIO23 is supply status for SATA disk () + * - GPIO24 is supply control for board (write 1 to power off) + * Last GPIO is 25, further bits are supposed to be 0. * Enable mask has ones for INPUT, 0 for OUTPUT. - * Default is LED ON. + * Default is LED ON, board ON :) */ -#define ORION5X_GPIO_OUT_ENABLE 0x03fcffff -#define ORION5X_GPIO_OUT_VALUE 0x03fcffff +#define ORION5X_GPIO_OUT_ENABLE 0xfef4f0ca +#define ORION5X_GPIO_OUT_VALUE 0x00000000 +#define ORION5X_GPIO_IN_POLARITY 0x000000d0 /* * NS16550 Configuration */ -#define CONFIG_SYS_NS16550 #define CONFIG_SYS_NS16550_SERIAL #define CONFIG_SYS_NS16550_REG_SIZE (-4) #define CONFIG_SYS_NS16550_CLK CONFIG_SYS_TCLK @@ -103,13 +110,9 @@ #define CONFIG_SYS_FLASH_CFI #define CONFIG_FLASH_CFI_DRIVER -#define CONFIG_FLASH_CFI_LEGACY #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max num of flash banks */ #define CONFIG_SYS_MAX_FLASH_SECT 11 /* max num of sects on one chip */ #define CONFIG_SYS_FLASH_BASE 0xfff80000 -#define CONFIG_SYS_FLASH_SECTSZ \ - {16384, 8192, 8192, 32768, \ - 65536, 65536, 65536, 65536, 65536, 65536, 65536} /* auto boot */ #define CONFIG_BOOTDELAY 3 /* default enable autoboot */ @@ -123,16 +126,13 @@ #define CONFIG_INITRD_TAG 1 /* enable INITRD tag */ #define CONFIG_SETUP_MEMORY_TAGS 1 /* enable memory tag */ -#define CONFIG_SYS_PROMPT "EDMiniV2> " /* Command Prompt */ #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buff Size */ #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE \ +sizeof(CONFIG_SYS_PROMPT) + 16) /* Print Buff */ /* - * Commands configuration - using default command set for now + * Commands configuration */ -#include #define CONFIG_CMD_IDE -#define CONFIG_CMD_I2C /* * Network @@ -145,7 +145,6 @@ #define CONFIG_PHY_BASE_ADR 0x8 #define CONFIG_RESET_PHY_R /* use reset_phy() to init mv8831116 PHY */ #define CONFIG_NETCONSOLE /* include NetConsole support */ -#define CONFIG_NET_MULTI /* specify more that one ports available */ #define CONFIG_MII /* expose smi ove miiphy interface */ #define CONFIG_SYS_FAULT_ECHO_LINK_DOWN /* detect link using phy */ #define CONFIG_ENV_OVERWRITE /* ethaddr can be reprogrammed */ @@ -158,7 +157,6 @@ #define __io #define CONFIG_IDE_PREINIT #define CONFIG_DOS_PARTITION -#define CONFIG_CMD_EXT2 /* ED Mini V has an IDE-compatible SATA connector for port 1 */ #define CONFIG_MVSATA_IDE #define CONFIG_MVSATA_IDE_USE_PORT1 @@ -182,12 +180,26 @@ /* end of IDE defines */ #endif /* CMD_IDE */ +/* + * Common USB/EHCI configuration + */ +#ifdef CONFIG_CMD_USB +#define CONFIG_USB_EHCI /* Enable EHCI USB support */ +#define CONFIG_USB_EHCI_MARVELL +#define ORION5X_USB20_HOST_PORT_BASE ORION5X_USB20_PORT0_BASE +#define CONFIG_USB_STORAGE +#define CONFIG_DOS_PARTITION +#define CONFIG_ISO_PARTITION +#define CONFIG_SUPPORT_VFAT +#endif /* CONFIG_CMD_USB */ + /* * I2C related stuff */ #ifdef CONFIG_CMD_I2C -#define CONFIG_I2C_MVTWSI -#define CONFIG_I2C_MVTWSI_BASE ORION5X_TWSI_BASE +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_MVTWSI +#define CONFIG_I2C_MVTWSI_BASE0 ORION5X_TWSI_BASE #define CONFIG_SYS_I2C_SLAVE 0x0 #define CONFIG_SYS_I2C_SPEED 100000 #endif @@ -203,9 +215,7 @@ /* * Size of malloc() pool */ -#define CONFIG_SYS_MALLOC_LEN (1024 * 128) /* 128kB for malloc() */ -/* size in bytes reserved for initial data */ -#define CONFIG_SYS_GBL_DATA_SIZE 128 +#define CONFIG_SYS_MALLOC_LEN (1024 * 256) /* 256kB for malloc() */ /* * Other required minimal configurations @@ -216,16 +226,21 @@ #define CONFIG_DISPLAY_CPUINFO /* Display cpu info */ #define CONFIG_NR_DRAM_BANKS 1 -#define CONFIG_STACKSIZE 0x00100000 #define CONFIG_SYS_LOAD_ADDR 0x00800000 #define CONFIG_SYS_MEMTEST_START 0x00400000 #define CONFIG_SYS_MEMTEST_END 0x007fffff #define CONFIG_SYS_RESET_ADDRESS 0xffff0000 #define CONFIG_SYS_MAXARGS 16 +/* Enable command line editing */ +#define CONFIG_CMDLINE_EDITING + +/* provide extensive help */ +#define CONFIG_SYS_LONGHELP + /* additions for new relocation code, must be added to all boards */ #define CONFIG_SYS_SDRAM_BASE 0 #define CONFIG_SYS_INIT_SP_ADDR \ - (CONFIG_SYS_SDRAM_BASE + 0x1000 - CONFIG_SYS_GBL_DATA_SIZE) + (CONFIG_SYS_SDRAM_BASE + 0x1000 - GENERATED_GBL_DATA_SIZE) #endif /* _CONFIG_EDMINIV2_H */