X-Git-Url: http://git.ipfire.org/?a=blobdiff_plain;f=include%2Fconfigs%2Fmx31pdk.h;h=14017600036da573bdb33b060eb4b94d12c1c0f8;hb=8435179271106ec6fe9a9a5679b897755b1db8dd;hp=7e709cd936268372689e3640bc9ee795e8ab9bb8;hpb=6f43ba70d15e15a08c25b3d956c70addb6740737;p=people%2Fms%2Fu-boot.git diff --git a/include/configs/mx31pdk.h b/include/configs/mx31pdk.h index 7e709cd936..1401760003 100644 --- a/include/configs/mx31pdk.h +++ b/include/configs/mx31pdk.h @@ -19,11 +19,6 @@ /* High Level Configuration Options */ #define CONFIG_MX31 /* This is a mx31 */ -#define CONFIG_SYS_GENERIC_BOARD - -#define CONFIG_DISPLAY_CPUINFO -#define CONFIG_DISPLAY_BOARDINFO - #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ #define CONFIG_SETUP_MEMORY_TAGS #define CONFIG_INITRD_TAG @@ -33,8 +28,6 @@ #define CONFIG_SPL_TARGET "u-boot-with-spl.bin" #define CONFIG_SPL_LDSCRIPT "arch/$(ARCH)/cpu/u-boot-spl.lds" #define CONFIG_SPL_MAX_SIZE 2048 -#define CONFIG_SPL_NAND_SUPPORT -#define CONFIG_SPL_LIBGENERIC_SUPPORT #define CONFIG_SPL_TEXT_BASE 0x87dc0000 #define CONFIG_SYS_TEXT_BASE 0x87e00000 @@ -80,17 +73,11 @@ /*********************************************************** * Command definition ***********************************************************/ -#define CONFIG_CMD_MII -#define CONFIG_CMD_PING -#define CONFIG_CMD_DHCP -#define CONFIG_CMD_SPI #define CONFIG_CMD_DATE #define CONFIG_CMD_NAND -#define CONFIG_CMD_BOOTZ #define CONFIG_BOARD_LATE_INIT -#define CONFIG_BOOTDELAY 1 #define CONFIG_EXTRA_ENV_SETTINGS \ "bootargs_base=setenv bootargs console=ttymxc0,115200\0" \ @@ -165,7 +152,7 @@ /* NAND configuration for the NAND_SPL */ -/* Start copying real U-boot from the second page */ +/* Start copying real U-Boot from the second page */ #define CONFIG_SYS_NAND_U_BOOT_OFFS CONFIG_SPL_PAD_TO #define CONFIG_SYS_NAND_U_BOOT_SIZE 0x3f800 /* Load U-Boot to this address */ @@ -178,7 +165,6 @@ #define CONFIG_SYS_NAND_SIZE (256 * 1024 * 1024) #define CONFIG_SYS_NAND_BAD_BLOCK_POS 0 - /* Configuration of lowlevel_init.S (clocks and SDRAM) */ #define CCM_CCMR_SETUP 0x074B0BF5 #define CCM_PDR0_SETUP_532MHZ (PDR0_CSI_PODF(0x3f) | PDR0_CSI_PRDF(7) | \