X-Git-Url: http://git.ipfire.org/?a=blobdiff_plain;f=include%2Fconfigs%2Fporter.h;h=eb28d1afcca6618833157427b1b3e71d43338641;hb=39bcbb7740b099b487b20ff6e345eb790a85712c;hp=f7cf7181df70858c32505f3e56e46534e70ee42e;hpb=b606e1bbc3428d0ebc320f11b361e1b79a21a640;p=people%2Fms%2Fu-boot.git

diff --git a/include/configs/porter.h b/include/configs/porter.h
index f7cf7181df..eb28d1afcc 100644
--- a/include/configs/porter.h
+++ b/include/configs/porter.h
@@ -16,18 +16,8 @@
 
 #include "rcar-gen2-common.h"
 
-#if defined(CONFIG_ARCH_RMOBILE_EXTRAM_BOOT)
-#define CONFIG_SYS_TEXT_BASE	0x70000000
-#else
-#define CONFIG_SYS_TEXT_BASE	0xE6304000
-#endif
-
-#if defined(CONFIG_ARCH_RMOBILE_EXTRAM_BOOT)
-#define CONFIG_SYS_INIT_SP_ADDR		0x7003FFFC
-#else
-#define CONFIG_SYS_INIT_SP_ADDR		0xE633fffC
-#endif
-#define STACK_AREA_SIZE			0xC000
+#define CONFIG_SYS_INIT_SP_ADDR		0x4f000000
+#define STACK_AREA_SIZE			0x00100000
 #define LOW_LEVEL_MERAM_STACK \
 		(CONFIG_SYS_INIT_SP_ADDR + STACK_AREA_SIZE - 4)
 
@@ -40,7 +30,6 @@
 
 /* FLASH */
 #define CONFIG_SPI
-#define CONFIG_SH_QSPI
 #define CONFIG_SPI_FLASH_QUAD
 
 /* SH Ether */
@@ -57,40 +46,18 @@
 #define RMOBILE_XTAL_CLK	20000000u
 #define CONFIG_SYS_CLK_FREQ	RMOBILE_XTAL_CLK
 #define CONFIG_SH_TMU_CLK_FREQ	(CONFIG_SYS_CLK_FREQ / 2)
-#define CONFIG_PLL1_CLK_FREQ	(CONFIG_SYS_CLK_FREQ * 156 / 2)
-#define CONFIG_P_CLK_FREQ	(CONFIG_PLL1_CLK_FREQ / 24)
 
 #define CONFIG_SYS_TMU_CLK_DIV	4
 
-/* i2c */
-#define CONFIG_SYS_I2C
-#define CONFIG_SYS_I2C_SH
-#define CONFIG_SYS_I2C_SLAVE		0x7F
-#define CONFIG_SYS_I2C_SH_NUM_CONTROLLERS	3
-#define CONFIG_SYS_I2C_SH_SPEED0	400000
-#define CONFIG_SYS_I2C_SH_SPEED1	400000
-#define CONFIG_SYS_I2C_SH_SPEED2	400000
-#define CONFIG_SH_I2C_DATA_HIGH		4
-#define CONFIG_SH_I2C_DATA_LOW		5
-#define CONFIG_SH_I2C_CLOCK		10000000
-
-#define CONFIG_SYS_I2C_POWERIC_ADDR	0x58 /* da9063 */
-
-/* USB */
-#define CONFIG_USB_EHCI_RMOBILE
-#define CONFIG_USB_MAX_CONTROLLER_COUNT	2
-
-/* SD */
-#define CONFIG_SH_SDHI_FREQ	97500000
+#define CONFIG_EXTRA_ENV_SETTINGS	\
+	"fdt_high=0xffffffff\0"		\
+	"initrd_high=0xffffffff\0"
 
-/* Module stop status bits */
-/* INTC-RT */
-#define CONFIG_SMSTP0_ENA	0x00400000
-/* MSIF */
-#define CONFIG_SMSTP2_ENA	0x00002000
-/* INTC-SYS, IRQC */
-#define CONFIG_SMSTP4_ENA	0x00000180
-/* SCIF0 */
-#define CONFIG_SMSTP7_ENA	0x00200000
+/* SPL support */
+#define CONFIG_SPL_TEXT_BASE		0xe6304000
+#define CONFIG_SPL_STACK		0xe6340000
+#define CONFIG_SPL_MAX_SIZE		0x40000
+#define CONFIG_SPL_SPI_LOAD
+#define CONFIG_SYS_SPI_U_BOOT_OFFS	0x140000
 
 #endif /* __PORTER_H */