X-Git-Url: http://git.ipfire.org/?a=blobdiff_plain;f=include%2Fconfigs%2Fstm32f746-disco.h;h=801980ea3388d2d1742f9392ebf585ec284360e9;hb=39bcbb7740b099b487b20ff6e345eb790a85712c;hp=807ab6574eb5144b38ee10e79833caa5ae5f7f56;hpb=adcc90b4014e683c06af95f48b247b755e9381d7;p=people%2Fms%2Fu-boot.git diff --git a/include/configs/stm32f746-disco.h b/include/configs/stm32f746-disco.h index 807ab6574e..801980ea33 100644 --- a/include/configs/stm32f746-disco.h +++ b/include/configs/stm32f746-disco.h @@ -1,6 +1,6 @@ /* - * (C) Copyright 2016 - * Vikas Manocha, + * Copyright (C) 2016, STMicroelectronics - All Rights Reserved + * Author(s): Vikas Manocha, for STMicroelectronics. * * SPDX-License-Identifier: GPL-2.0+ */ @@ -8,42 +8,34 @@ #ifndef __CONFIG_H #define __CONFIG_H -#define CONFIG_SYS_THUMB_BUILD -/*#define CONFIG_SYS_NO_FLASH*/ - -#define CONFIG_OF_LIBFDT -#define CONFIG_BOARD_EARLY_INIT_F - #define CONFIG_SYS_FLASH_BASE 0x08000000 #define CONFIG_SYS_INIT_SP_ADDR 0x20050000 -#define CONFIG_SYS_TEXT_BASE 0x08000000 -#define CONFIG_SYS_ICACHE_OFF -#define CONFIG_SYS_DCACHE_OFF +#ifdef CONFIG_SUPPORT_SPL +#define CONFIG_SYS_LOAD_ADDR 0x08008000 +#else +#define CONFIG_SYS_LOAD_ADDR 0xC0400000 +#define CONFIG_LOADADDR 0xC0400000 +#endif /* * Configuration of the external SDRAM memory */ #define CONFIG_NR_DRAM_BANKS 1 -#define CONFIG_SYS_RAM_SIZE ((64 + 192) << 10) -#define CONFIG_SYS_RAM_CS 1 -#define CONFIG_SYS_RAM_FREQ_DIV 2 -#define CONFIG_SYS_RAM_BASE 0x20000000 -#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_RAM_BASE -#define CONFIG_SYS_LOAD_ADDR 0x20000000 -#define CONFIG_LOADADDR 0x20000000 #define CONFIG_SYS_MAX_FLASH_SECT 8 #define CONFIG_SYS_MAX_FLASH_BANKS 1 -#define CONFIG_ENV_IS_NOWHERE #define CONFIG_ENV_SIZE (8 << 10) -#define CONFIG_STM32_GPIO #define CONFIG_STM32_FLASH -#define CONFIG_STM32X7_SERIAL -#define CONFIG_SYS_CLK_FREQ 16*1000*1000 /* 180 MHz */ +#define CONFIG_DW_GMAC_DEFAULT_DMA_PBL (8) +#define CONFIG_DW_ALTDESCRIPTOR +#define CONFIG_MII +#define CONFIG_PHY_SMSC + +#define CONFIG_SYS_CLK_FREQ 200000000 /* 200 MHz */ #define CONFIG_SYS_HZ_CLOCK 1000000 /* Timer is clocked at 1MHz */ #define CONFIG_CMDLINE_TAG @@ -52,16 +44,9 @@ #define CONFIG_REVISION_TAG #define CONFIG_SYS_CBSIZE 1024 -#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE \ - + sizeof(CONFIG_SYS_PROMPT) + 16) -#define CONFIG_SYS_MAXARGS 16 -#define CONFIG_SYS_MALLOC_LEN (16 * 1024) -#define CONFIG_STACKSIZE (64 << 10) +#define CONFIG_SYS_MALLOC_LEN (1 * 1024 * 1024) -#define CONFIG_BAUDRATE 115200 -#define CONFIG_BOOTARGS \ - "console=ttyS0,115200 earlyprintk consoleblank=0 ignore_loglevel" #define CONFIG_BOOTCOMMAND \ "run bootcmd_romfs" @@ -70,17 +55,28 @@ "bootcmd_romfs=setenv bootargs ${bootargs} ${bootargs_romfs};" \ "bootm 0x08044000 - 0x08042000\0" -#define CONFIG_BOOTDELAY 3 /* * Command line configuration. */ -#define CONFIG_SYS_LONGHELP -#define CONFIG_SYS_HUSH_PARSER -#define CONFIG_AUTO_COMPLETE -#define CONFIG_CMDLINE_EDITING - -#define CONFIG_CMD_MEM -#define CONFIG_CMD_TIMER -#undef CONFIG_CMD_IMLS +#define CONFIG_CMD_CACHE +#define CONFIG_BOARD_LATE_INIT +#define CONFIG_DISPLAY_BOARDINFO + +/* For SPL */ +#ifdef CONFIG_SUPPORT_SPL +#define CONFIG_SPL_STACK CONFIG_SYS_INIT_SP_ADDR +#define CONFIG_SPL_TEXT_BASE CONFIG_SYS_FLASH_BASE +#define CONFIG_SYS_MONITOR_LEN (512 * 1024) +#define CONFIG_SYS_SPL_LEN 0x00008000 +#define CONFIG_SYS_UBOOT_START 0x080083FD +#define CONFIG_SYS_UBOOT_BASE (CONFIG_SYS_FLASH_BASE + \ + CONFIG_SYS_SPL_LEN) + +/* DT blob (fdt) address */ +#define CONFIG_SYS_FDT_BASE (CONFIG_SYS_FLASH_BASE + \ + 0x1C0000) +#endif +/* For SPL ends */ + #endif /* __CONFIG_H */