X-Git-Url: http://git.ipfire.org/?a=blobdiff_plain;f=opcodes%2Favr-dis.c;h=aab37962688d88d11c94f857740cef02f148bc5f;hb=a2c5833233df078288c791c348a265c96c6182da;hp=97f1df5d35f624e2945672983c4fe65530a2ae40;hpb=88c1242dc0a1e1ab582a65ea8bd05eb5f244c59b;p=thirdparty%2Fbinutils-gdb.git diff --git a/opcodes/avr-dis.c b/opcodes/avr-dis.c index 97f1df5d35f..aab37962688 100644 --- a/opcodes/avr-dis.c +++ b/opcodes/avr-dis.c @@ -1,5 +1,5 @@ /* Disassemble AVR instructions. - Copyright (C) 1999-2017 Free Software Foundation, Inc. + Copyright (C) 1999-2022 Free Software Foundation, Inc. Contributed by Denis Chertykov @@ -25,7 +25,7 @@ #include "disassemble.h" #include "opintl.h" #include "libiberty.h" -#include "bfd_stdint.h" +#include struct avr_opcodes_s { @@ -49,8 +49,17 @@ const struct avr_opcodes_s avr_opcodes[] = static const char * comment_start = "0x"; static int -avr_operand (unsigned int insn, unsigned int insn2, unsigned int pc, int constraint, - char *opcode_str, char *buf, char *comment, int regs, int *sym, bfd_vma *sym_addr) +avr_operand (unsigned int insn, + unsigned int insn2, + unsigned int pc, + int constraint, + char * opcode_str, + char * buf, + char * comment, + int regs, + int * sym, + bfd_vma * sym_addr, + disassemble_info * info) { int ok = 1; *sym = 0; @@ -161,6 +170,9 @@ avr_operand (unsigned int insn, unsigned int insn2, unsigned int pc, int constra objdump_print_address() which would affect many targets. */ sprintf (buf, "%#lx", (unsigned long) *sym_addr); strcpy (comment, comment_start); + info->insn_info_valid = 1; + info->insn_type = dis_jsr; + info->target = *sym_addr; break; case 'L': @@ -170,6 +182,9 @@ avr_operand (unsigned int insn, unsigned int insn2, unsigned int pc, int constra *sym = 1; *sym_addr = pc + 2 + rel_addr; strcpy (comment, comment_start); + info->insn_info_valid = 1; + info->insn_type = dis_branch; + info->target = *sym_addr; } break; @@ -181,6 +196,9 @@ avr_operand (unsigned int insn, unsigned int insn2, unsigned int pc, int constra *sym = 1; *sym_addr = pc + 2 + rel_addr; strcpy (comment, comment_start); + info->insn_info_valid = 1; + info->insn_type = dis_condbranch; + info->target = *sym_addr; } break; @@ -198,6 +216,8 @@ avr_operand (unsigned int insn, unsigned int insn2, unsigned int pc, int constra { unsigned int val = ((insn & 0xf) | ((insn & 0x600) >> 5) | ((insn & 0x100) >> 2)); + if ((insn & 0x100) == 0) + val |= 0x80; *sym = 1; *sym_addr = val | 0x800000; sprintf (buf, "0x%02x", val); @@ -212,7 +232,8 @@ avr_operand (unsigned int insn, unsigned int insn2, unsigned int pc, int constra case 'n': sprintf (buf, "??"); - fprintf (stderr, _("Internal disassembler error")); + /* xgettext:c-format */ + opcodes_error_handler (_("internal disassembler error")); ok = 0; break; @@ -265,7 +286,8 @@ avr_operand (unsigned int insn, unsigned int insn2, unsigned int pc, int constra default: sprintf (buf, "??"); - fprintf (stderr, _("unknown constraint `%c'"), constraint); + /* xgettext:c-format */ + opcodes_error_handler (_("unknown constraint `%c'"), constraint); ok = 0; } @@ -310,6 +332,13 @@ print_insn_avr (bfd_vma addr, disassemble_info *info) int sym_op1 = 0, sym_op2 = 0; bfd_vma sym_addr1, sym_addr2; + /* Clear instruction information field. */ + info->insn_info_valid = 0; + info->branch_delay_insns = 0; + info->data_size = 0; + info->insn_type = dis_noninsn; + info->target = 0; + info->target2 = 0; if (!initialized) { @@ -391,11 +420,13 @@ print_insn_avr (bfd_vma addr, disassemble_info *info) { int regs = REGISTER_P (*constraints); - ok = avr_operand (insn, insn2, addr, *constraints, opcode_str, op1, comment1, 0, &sym_op1, &sym_addr1); + ok = avr_operand (insn, insn2, addr, *constraints, opcode_str, op1, + comment1, 0, &sym_op1, &sym_addr1, info); if (ok && *(++constraints) == ',') - ok = avr_operand (insn, insn2, addr, *(++constraints), opcode_str, op2, - *comment1 ? comment2 : comment1, regs, &sym_op2, &sym_addr2); + ok = avr_operand (insn, insn2, addr, *(++constraints), opcode_str, + op2, *comment1 ? comment2 : comment1, regs, + &sym_op2, &sym_addr2, info); } }