X-Git-Url: http://git.ipfire.org/?a=blobdiff_plain;f=sim%2Fcris%2Fmodelv32.c;h=1f429ac38495c4358875c5f7000c301320d5d219;hb=4744ac1bb0d2f2294c7762577262fdcafb67883b;hp=bd889af8166afb458232e337eef884896de392e9;hpb=cce0efb55e75ff1caac4f6037744ccd0c9c8cdde;p=thirdparty%2Fbinutils-gdb.git

diff --git a/sim/cris/modelv32.c b/sim/cris/modelv32.c
index bd889af8166..1f429ac3849 100644
--- a/sim/cris/modelv32.c
+++ b/sim/cris/modelv32.c
@@ -8,17 +8,16 @@ This file is part of the GNU simulators.
 
 This program is free software; you can redistribute it and/or modify
 it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 2, or (at your option)
-any later version.
+the Free Software Foundation; either version 3 of the License, or
+(at your option) any later version.
 
 This program is distributed in the hope that it will be useful,
 but WITHOUT ANY WARRANTY; without even the implied warranty of
 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 GNU General Public License for more details.
 
-You should have received a copy of the GNU General Public License along
-with this program; if not, write to the Free Software Foundation, Inc.,
-59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
+You should have received a copy of the GNU General Public License
+along with this program.  If not, see <http://www.gnu.org/licenses/>.
 
 */
 
@@ -1276,60 +1275,10 @@ model_crisv32_move_m_sprv32 (SIM_CPU *current_cpu, void *sem_arg)
 #undef FLD
 }
 
-static int
-model_crisv32_move_c_sprv32_p0 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_move_c_sprv32_p0.f
-  const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
-  const IDESC * UNUSED idesc = abuf->idesc;
-  int cycles = 0;
-  {
-    int referenced = 0;
-    int UNUSED insn_referenced = abuf->written;
-    cycles += crisv32f_model_crisv32_u_const32 (current_cpu, idesc, 0, referenced);
-  }
-  {
-    int referenced = 0;
-    int UNUSED insn_referenced = abuf->written;
-    INT in_Rs = -1;
-    INT out_Pd = -1;
-    out_Pd = FLD (out_Pd);
-    referenced |= 1 << 1;
-    cycles += crisv32f_model_crisv32_u_exec_to_sr (current_cpu, idesc, 1, referenced, in_Rs, out_Pd);
-  }
-  return cycles;
-#undef FLD
-}
-
-static int
-model_crisv32_move_c_sprv32_p1 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_move_c_sprv32_p0.f
-  const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
-  const IDESC * UNUSED idesc = abuf->idesc;
-  int cycles = 0;
-  {
-    int referenced = 0;
-    int UNUSED insn_referenced = abuf->written;
-    cycles += crisv32f_model_crisv32_u_const32 (current_cpu, idesc, 0, referenced);
-  }
-  {
-    int referenced = 0;
-    int UNUSED insn_referenced = abuf->written;
-    INT in_Rs = -1;
-    INT out_Pd = -1;
-    out_Pd = FLD (out_Pd);
-    referenced |= 1 << 1;
-    cycles += crisv32f_model_crisv32_u_exec_to_sr (current_cpu, idesc, 1, referenced, in_Rs, out_Pd);
-  }
-  return cycles;
-#undef FLD
-}
-
 static int
 model_crisv32_move_c_sprv32_p2 (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.sfmt_move_c_sprv32_p0.f
+#define FLD(f) abuf->fields.sfmt_move_c_sprv32_p2.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -1354,32 +1303,7 @@ model_crisv32_move_c_sprv32_p2 (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_crisv32_move_c_sprv32_p3 (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.sfmt_move_c_sprv32_p0.f
-  const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
-  const IDESC * UNUSED idesc = abuf->idesc;
-  int cycles = 0;
-  {
-    int referenced = 0;
-    int UNUSED insn_referenced = abuf->written;
-    cycles += crisv32f_model_crisv32_u_const32 (current_cpu, idesc, 0, referenced);
-  }
-  {
-    int referenced = 0;
-    int UNUSED insn_referenced = abuf->written;
-    INT in_Rs = -1;
-    INT out_Pd = -1;
-    out_Pd = FLD (out_Pd);
-    referenced |= 1 << 1;
-    cycles += crisv32f_model_crisv32_u_exec_to_sr (current_cpu, idesc, 1, referenced, in_Rs, out_Pd);
-  }
-  return cycles;
-#undef FLD
-}
-
-static int
-model_crisv32_move_c_sprv32_p4 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_move_c_sprv32_p0.f
+#define FLD(f) abuf->fields.sfmt_move_c_sprv32_p2.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -1404,7 +1328,7 @@ model_crisv32_move_c_sprv32_p4 (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_crisv32_move_c_sprv32_p5 (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.sfmt_move_c_sprv32_p0.f
+#define FLD(f) abuf->fields.sfmt_move_c_sprv32_p2.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -1429,7 +1353,7 @@ model_crisv32_move_c_sprv32_p5 (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_crisv32_move_c_sprv32_p6 (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.sfmt_move_c_sprv32_p0.f
+#define FLD(f) abuf->fields.sfmt_move_c_sprv32_p2.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -1454,32 +1378,7 @@ model_crisv32_move_c_sprv32_p6 (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_crisv32_move_c_sprv32_p7 (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.sfmt_move_c_sprv32_p0.f
-  const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
-  const IDESC * UNUSED idesc = abuf->idesc;
-  int cycles = 0;
-  {
-    int referenced = 0;
-    int UNUSED insn_referenced = abuf->written;
-    cycles += crisv32f_model_crisv32_u_const32 (current_cpu, idesc, 0, referenced);
-  }
-  {
-    int referenced = 0;
-    int UNUSED insn_referenced = abuf->written;
-    INT in_Rs = -1;
-    INT out_Pd = -1;
-    out_Pd = FLD (out_Pd);
-    referenced |= 1 << 1;
-    cycles += crisv32f_model_crisv32_u_exec_to_sr (current_cpu, idesc, 1, referenced, in_Rs, out_Pd);
-  }
-  return cycles;
-#undef FLD
-}
-
-static int
-model_crisv32_move_c_sprv32_p8 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_move_c_sprv32_p0.f
+#define FLD(f) abuf->fields.sfmt_move_c_sprv32_p2.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -1504,7 +1403,7 @@ model_crisv32_move_c_sprv32_p8 (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_crisv32_move_c_sprv32_p9 (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.sfmt_move_c_sprv32_p0.f
+#define FLD(f) abuf->fields.sfmt_move_c_sprv32_p2.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -1529,7 +1428,7 @@ model_crisv32_move_c_sprv32_p9 (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_crisv32_move_c_sprv32_p10 (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.sfmt_move_c_sprv32_p0.f
+#define FLD(f) abuf->fields.sfmt_move_c_sprv32_p2.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -1554,7 +1453,7 @@ model_crisv32_move_c_sprv32_p10 (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_crisv32_move_c_sprv32_p11 (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.sfmt_move_c_sprv32_p0.f
+#define FLD(f) abuf->fields.sfmt_move_c_sprv32_p2.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -1579,7 +1478,7 @@ model_crisv32_move_c_sprv32_p11 (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_crisv32_move_c_sprv32_p12 (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.sfmt_move_c_sprv32_p0.f
+#define FLD(f) abuf->fields.sfmt_move_c_sprv32_p2.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -1604,7 +1503,7 @@ model_crisv32_move_c_sprv32_p12 (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_crisv32_move_c_sprv32_p13 (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.sfmt_move_c_sprv32_p0.f
+#define FLD(f) abuf->fields.sfmt_move_c_sprv32_p2.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -1629,7 +1528,7 @@ model_crisv32_move_c_sprv32_p13 (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_crisv32_move_c_sprv32_p14 (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.sfmt_move_c_sprv32_p0.f
+#define FLD(f) abuf->fields.sfmt_move_c_sprv32_p2.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -1654,7 +1553,7 @@ model_crisv32_move_c_sprv32_p14 (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_crisv32_move_c_sprv32_p15 (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.sfmt_move_c_sprv32_p0.f
+#define FLD(f) abuf->fields.sfmt_move_c_sprv32_p2.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -4986,7 +4885,7 @@ model_crisv32_jas_r (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_crisv32_jas_c (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.sfmt_move_c_sprv32_p0.f
+#define FLD(f) abuf->fields.sfmt_move_c_sprv32_p2.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -5119,7 +5018,7 @@ model_crisv32_jasc_r (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_crisv32_jasc_c (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.sfmt_move_c_sprv32_p0.f
+#define FLD(f) abuf->fields.sfmt_move_c_sprv32_p2.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -5827,15 +5726,11 @@ static const INSN_TIMING crisv32_timing[] = {
   { CRISV32F_INSN_MOVE_R_SPRV32, model_crisv32_move_r_sprv32, { { (int) UNIT_CRISV32_U_EXEC_TO_SR, 1, 1 } } },
   { CRISV32F_INSN_MOVE_SPR_RV32, model_crisv32_move_spr_rv32, { { (int) UNIT_CRISV32_U_EXEC, 1, 1 } } },
   { CRISV32F_INSN_MOVE_M_SPRV32, model_crisv32_move_m_sprv32, { { (int) UNIT_CRISV32_U_MEM, 1, 1 }, { (int) UNIT_CRISV32_U_MEM_R, 1, 1 }, { (int) UNIT_CRISV32_U_EXEC_TO_SR, 1, 1 } } },
-  { CRISV32F_INSN_MOVE_C_SPRV32_P0, model_crisv32_move_c_sprv32_p0, { { (int) UNIT_CRISV32_U_CONST32, 1, 1 }, { (int) UNIT_CRISV32_U_EXEC_TO_SR, 1, 1 } } },
-  { CRISV32F_INSN_MOVE_C_SPRV32_P1, model_crisv32_move_c_sprv32_p1, { { (int) UNIT_CRISV32_U_CONST32, 1, 1 }, { (int) UNIT_CRISV32_U_EXEC_TO_SR, 1, 1 } } },
   { CRISV32F_INSN_MOVE_C_SPRV32_P2, model_crisv32_move_c_sprv32_p2, { { (int) UNIT_CRISV32_U_CONST32, 1, 1 }, { (int) UNIT_CRISV32_U_EXEC_TO_SR, 1, 1 } } },
   { CRISV32F_INSN_MOVE_C_SPRV32_P3, model_crisv32_move_c_sprv32_p3, { { (int) UNIT_CRISV32_U_CONST32, 1, 1 }, { (int) UNIT_CRISV32_U_EXEC_TO_SR, 1, 1 } } },
-  { CRISV32F_INSN_MOVE_C_SPRV32_P4, model_crisv32_move_c_sprv32_p4, { { (int) UNIT_CRISV32_U_CONST32, 1, 1 }, { (int) UNIT_CRISV32_U_EXEC_TO_SR, 1, 1 } } },
   { CRISV32F_INSN_MOVE_C_SPRV32_P5, model_crisv32_move_c_sprv32_p5, { { (int) UNIT_CRISV32_U_CONST32, 1, 1 }, { (int) UNIT_CRISV32_U_EXEC_TO_SR, 1, 1 } } },
   { CRISV32F_INSN_MOVE_C_SPRV32_P6, model_crisv32_move_c_sprv32_p6, { { (int) UNIT_CRISV32_U_CONST32, 1, 1 }, { (int) UNIT_CRISV32_U_EXEC_TO_SR, 1, 1 } } },
   { CRISV32F_INSN_MOVE_C_SPRV32_P7, model_crisv32_move_c_sprv32_p7, { { (int) UNIT_CRISV32_U_CONST32, 1, 1 }, { (int) UNIT_CRISV32_U_EXEC_TO_SR, 1, 1 } } },
-  { CRISV32F_INSN_MOVE_C_SPRV32_P8, model_crisv32_move_c_sprv32_p8, { { (int) UNIT_CRISV32_U_CONST32, 1, 1 }, { (int) UNIT_CRISV32_U_EXEC_TO_SR, 1, 1 } } },
   { CRISV32F_INSN_MOVE_C_SPRV32_P9, model_crisv32_move_c_sprv32_p9, { { (int) UNIT_CRISV32_U_CONST32, 1, 1 }, { (int) UNIT_CRISV32_U_EXEC_TO_SR, 1, 1 } } },
   { CRISV32F_INSN_MOVE_C_SPRV32_P10, model_crisv32_move_c_sprv32_p10, { { (int) UNIT_CRISV32_U_CONST32, 1, 1 }, { (int) UNIT_CRISV32_U_EXEC_TO_SR, 1, 1 } } },
   { CRISV32F_INSN_MOVE_C_SPRV32_P11, model_crisv32_move_c_sprv32_p11, { { (int) UNIT_CRISV32_U_CONST32, 1, 1 }, { (int) UNIT_CRISV32_U_EXEC_TO_SR, 1, 1 } } },