X-Git-Url: http://git.ipfire.org/?a=blobdiff_plain;f=sim%2Fd10v%2Finterp.c;h=70004296f68f0fbb19a0dd3c27e5d226a67ff228;hb=e9b0081f986716eca364580fdfeb1034c5da76c9;hp=f56df31c298be0bab775cd9008c04e8147c89517;hpb=27e232885db363fb545fd2f450e72d929e59b8f6;p=thirdparty%2Fbinutils-gdb.git diff --git a/sim/d10v/interp.c b/sim/d10v/interp.c index f56df31c298..70004296f68 100644 --- a/sim/d10v/interp.c +++ b/sim/d10v/interp.c @@ -1,64 +1,48 @@ +#include "config.h" +#include #include -#include "sysdep.h" #include "bfd.h" -#include "callback.h" -#include "remote-sim.h" +#include "gdb/callback.h" +#include "gdb/remote-sim.h" -#include "d10v_sim.h" -#include "sim-d10v.h" +#include "sim-main.h" +#include "sim-options.h" + +#include "gdb/sim-d10v.h" +#include "gdb/signals.h" + +#ifdef HAVE_STRING_H +#include +#else +#ifdef HAVE_STRINGS_H +#include +#endif /* HAVE_STRING_H */ +#endif /* HAVE_STRINGS_H */ + +#ifdef HAVE_STDLIB_H +#include +#endif enum _leftright { LEFT_FIRST, RIGHT_FIRST }; -static char *myname; -static SIM_OPEN_KIND sim_kind; int d10v_debug; /* Set this to true to get the previous segment layout. */ int old_segment_mapping; -host_callback *d10v_callback; unsigned long ins_type_counters[ (int)INS_MAX ]; uint16 OP[4]; -static int init_text_p = 0; -/* non-zero if we opened prog_bfd */ -static int prog_bfd_was_opened_p; -bfd *prog_bfd; -asection *text; -bfd_vma text_start; -bfd_vma text_end; - -static long hash PARAMS ((long insn, int format)); -static struct hash_entry *lookup_hash PARAMS ((uint32 ins, int size)); -static void get_operands PARAMS ((struct simops *s, uint32 ins)); -static void do_long PARAMS ((uint32 ins)); -static void do_2_short PARAMS ((uint16 ins1, uint16 ins2, enum _leftright leftright)); -static void do_parallel PARAMS ((uint16 ins1, uint16 ins2)); -static char *add_commas PARAMS ((char *buf, int sizeof_buf, unsigned long value)); -extern void sim_set_profile PARAMS ((int n)); -extern void sim_set_profile_size PARAMS ((int n)); -static INLINE uint8 *map_memory (unsigned phys_addr); - -#ifdef NEED_UI_LOOP_HOOK -/* How often to run the ui_loop update, when in use */ -#define UI_LOOP_POLL_INTERVAL 0x14000 - -/* Counter for the ui_loop_hook update */ -static long ui_loop_hook_counter = UI_LOOP_POLL_INTERVAL; - -/* Actual hook to call to run through gdb's gui event loop */ -extern int (*ui_loop_hook) PARAMS ((int signo)); -#endif /* NEED_UI_LOOP_HOOK */ - -#ifndef INLINE -#if defined(__GNUC__) && defined(__OPTIMIZE__) -#define INLINE __inline__ -#else -#define INLINE -#endif -#endif +static long hash (long insn, int format); +static struct hash_entry *lookup_hash (SIM_DESC, SIM_CPU *, uint32 ins, int size); +static void get_operands (struct simops *s, uint32 ins); +static void do_long (SIM_DESC, SIM_CPU *, uint32 ins); +static void do_2_short (SIM_DESC, SIM_CPU *, uint16 ins1, uint16 ins2, enum _leftright leftright); +static void do_parallel (SIM_DESC, SIM_CPU *, uint16 ins1, uint16 ins2); +static char *add_commas (char *buf, int sizeof_buf, unsigned long value); +static INLINE uint8 *map_memory (SIM_DESC, SIM_CPU *, unsigned phys_addr); #define MAX_HASH 63 struct hash_entry @@ -73,9 +57,7 @@ struct hash_entry struct hash_entry hash_table[MAX_HASH+1]; INLINE static long -hash(insn, format) - long insn; - int format; +hash (long insn, int format) { if (format & LONG_OPCODE) return ((insn & 0x3F000000) >> 24); @@ -84,9 +66,7 @@ hash(insn, format) } INLINE static struct hash_entry * -lookup_hash (ins, size) - uint32 ins; - int size; +lookup_hash (SIM_DESC sd, SIM_CPU *cpu, uint32 ins, int size) { struct hash_entry *h; @@ -98,11 +78,7 @@ lookup_hash (ins, size) while ((ins & h->mask) != h->opcode || h->size != size) { if (h->next == NULL) - { - State.exception = SIGILL; - State.pc_changed = 1; /* Don't increment the PC. */ - return NULL; - } + sim_engine_halt (sd, cpu, NULL, PC, sim_stopped, SIM_SIGILL); h = h->next; } return (h); @@ -126,56 +102,33 @@ get_operands (struct simops *s, uint32 ins) State.trace.psw = PSW; } -bfd_vma -decode_pc () -{ - asection *s; - if (!init_text_p && prog_bfd != NULL) - { - init_text_p = 1; - for (s = prog_bfd->sections; s; s = s->next) - if (strcmp (bfd_get_section_name (prog_bfd, s), ".text") == 0) - { - text = s; - text_start = bfd_get_section_vma (prog_bfd, s); - text_end = text_start + bfd_section_size (prog_bfd, s); - break; - } - } - - return (PC << 2) + text_start; -} - static void -do_long (ins) - uint32 ins; +do_long (SIM_DESC sd, SIM_CPU *cpu, uint32 ins) { struct hash_entry *h; #ifdef DEBUG if ((d10v_debug & DEBUG_INSTRUCTION) != 0) - (*d10v_callback->printf_filtered) (d10v_callback, "do_long 0x%x\n", ins); + sim_io_printf (sd, "do_long 0x%x\n", ins); #endif - h = lookup_hash (ins, 1); + h = lookup_hash (sd, cpu, ins, 1); if (h == NULL) return; get_operands (h->ops, ins); State.ins_type = INS_LONG; ins_type_counters[ (int)State.ins_type ]++; - (h->ops->func)(); + (h->ops->func) (sd, cpu); } static void -do_2_short (ins1, ins2, leftright) - uint16 ins1, ins2; - enum _leftright leftright; +do_2_short (SIM_DESC sd, SIM_CPU *cpu, uint16 ins1, uint16 ins2, enum _leftright leftright) { struct hash_entry *h; enum _ins_type first, second; #ifdef DEBUG if ((d10v_debug & DEBUG_INSTRUCTION) != 0) - (*d10v_callback->printf_filtered) (d10v_callback, "do_2_short 0x%x (%s) -> 0x%x\n", - ins1, (leftright) ? "left" : "right", ins2); + sim_io_printf (sd, "do_2_short 0x%x (%s) -> 0x%x\n", ins1, + leftright ? "left" : "right", ins2); #endif if (leftright == LEFT_FIRST) @@ -192,46 +145,45 @@ do_2_short (ins1, ins2, leftright) } /* Issue the first instruction */ - h = lookup_hash (ins1, 0); + h = lookup_hash (sd, cpu, ins1, 0); if (h == NULL) return; get_operands (h->ops, ins1); State.ins_type = first; ins_type_counters[ (int)State.ins_type ]++; - (h->ops->func)(); + (h->ops->func) (sd, cpu); /* Issue the second instruction (if the PC hasn't changed) */ - if (!State.pc_changed && !State.exception) + if (!State.pc_changed) { /* finish any existing instructions */ SLOT_FLUSH (); - h = lookup_hash (ins2, 0); + h = lookup_hash (sd, cpu, ins2, 0); if (h == NULL) return; get_operands (h->ops, ins2); State.ins_type = second; ins_type_counters[ (int)State.ins_type ]++; ins_type_counters[ (int)INS_CYCLES ]++; - (h->ops->func)(); + (h->ops->func) (sd, cpu); } - else if (!State.exception) + else ins_type_counters[ (int)INS_COND_JUMP ]++; } static void -do_parallel (ins1, ins2) - uint16 ins1, ins2; +do_parallel (SIM_DESC sd, SIM_CPU *cpu, uint16 ins1, uint16 ins2) { struct hash_entry *h1, *h2; #ifdef DEBUG if ((d10v_debug & DEBUG_INSTRUCTION) != 0) - (*d10v_callback->printf_filtered) (d10v_callback, "do_parallel 0x%x || 0x%x\n", ins1, ins2); + sim_io_printf (sd, "do_parallel 0x%x || 0x%x\n", ins1, ins2); #endif ins_type_counters[ (int)INS_PARALLEL ]++; - h1 = lookup_hash (ins1, 0); + h1 = lookup_hash (sd, cpu, ins1, 0); if (h1 == NULL) return; - h2 = lookup_hash (ins2, 0); + h2 = lookup_hash (sd, cpu, ins2, 0); if (h2 == NULL) return; @@ -240,14 +192,14 @@ do_parallel (ins1, ins2) get_operands (h1->ops, ins1); State.ins_type = INS_LEFT_COND_TEST; ins_type_counters[ (int)State.ins_type ]++; - (h1->ops->func)(); + (h1->ops->func) (sd, cpu); if (State.exe) { ins_type_counters[ (int)INS_COND_TRUE ]++; get_operands (h2->ops, ins2); State.ins_type = INS_RIGHT_COND_EXE; ins_type_counters[ (int)State.ins_type ]++; - (h2->ops->func)(); + (h2->ops->func) (sd, cpu); } else ins_type_counters[ (int)INS_COND_FALSE ]++; @@ -257,14 +209,14 @@ do_parallel (ins1, ins2) get_operands (h2->ops, ins2); State.ins_type = INS_RIGHT_COND_TEST; ins_type_counters[ (int)State.ins_type ]++; - (h2->ops->func)(); + (h2->ops->func) (sd, cpu); if (State.exe) { ins_type_counters[ (int)INS_COND_TRUE ]++; get_operands (h1->ops, ins1); State.ins_type = INS_LEFT_COND_EXE; ins_type_counters[ (int)State.ins_type ]++; - (h1->ops->func)(); + (h1->ops->func) (sd, cpu); } else ins_type_counters[ (int)INS_COND_FALSE ]++; @@ -274,22 +226,16 @@ do_parallel (ins1, ins2) get_operands (h1->ops, ins1); State.ins_type = INS_LEFT_PARALLEL; ins_type_counters[ (int)State.ins_type ]++; - (h1->ops->func)(); - if (!State.exception) - { - get_operands (h2->ops, ins2); - State.ins_type = INS_RIGHT_PARALLEL; - ins_type_counters[ (int)State.ins_type ]++; - (h2->ops->func)(); - } + (h1->ops->func) (sd, cpu); + get_operands (h2->ops, ins2); + State.ins_type = INS_RIGHT_PARALLEL; + ins_type_counters[ (int)State.ins_type ]++; + (h2->ops->func) (sd, cpu); } } static char * -add_commas(buf, sizeof_buf, value) - char *buf; - int sizeof_buf; - unsigned long value; +add_commas (char *buf, int sizeof_buf, unsigned long value) { int comma = 3; char *endbuf = buf + sizeof_buf - 1; @@ -308,10 +254,8 @@ add_commas(buf, sizeof_buf, value) return endbuf; } -void -sim_size (power) - int power; - +static void +sim_size (int power) { int i; for (i = 0; i < IMEM_SEGMENTS; i++) @@ -348,47 +292,45 @@ enum }; static void -set_dmap_register (int reg_nr, unsigned long value) +set_dmap_register (SIM_DESC sd, int reg_nr, unsigned long value) { - uint8 *raw = map_memory (SIM_D10V_MEMORY_DATA + uint8 *raw = map_memory (sd, NULL, SIM_D10V_MEMORY_DATA + DMAP0_OFFSET + 2 * reg_nr); WRITE_16 (raw, value); #ifdef DEBUG if ((d10v_debug & DEBUG_MEMORY)) { - (*d10v_callback->printf_filtered) - (d10v_callback, "mem: dmap%d=0x%04lx\n", reg_nr, value); + sim_io_printf (sd, "mem: dmap%d=0x%04lx\n", reg_nr, value); } #endif } static unsigned long -dmap_register (int reg_nr) +dmap_register (SIM_DESC sd, SIM_CPU *cpu, void *regcache, int reg_nr) { - uint8 *raw = map_memory (SIM_D10V_MEMORY_DATA + uint8 *raw = map_memory (sd, cpu, SIM_D10V_MEMORY_DATA + DMAP0_OFFSET + 2 * reg_nr); return READ_16 (raw); } static void -set_imap_register (int reg_nr, unsigned long value) +set_imap_register (SIM_DESC sd, int reg_nr, unsigned long value) { - uint8 *raw = map_memory (SIM_D10V_MEMORY_DATA + uint8 *raw = map_memory (sd, NULL, SIM_D10V_MEMORY_DATA + IMAP0_OFFSET + 2 * reg_nr); WRITE_16 (raw, value); #ifdef DEBUG if ((d10v_debug & DEBUG_MEMORY)) { - (*d10v_callback->printf_filtered) - (d10v_callback, "mem: imap%d=0x%04lx\n", reg_nr, value); + sim_io_printf (sd, "mem: imap%d=0x%04lx\n", reg_nr, value); } #endif } static unsigned long -imap_register (int reg_nr) +imap_register (SIM_DESC sd, SIM_CPU *cpu, void *regcache, int reg_nr) { - uint8 *raw = map_memory (SIM_D10V_MEMORY_DATA + uint8 *raw = map_memory (sd, cpu, SIM_D10V_MEMORY_DATA + IMAP0_OFFSET + 2 * reg_nr); return READ_16 (raw); } @@ -436,11 +378,17 @@ set_spu_register (unsigned long value) /* Given a virtual address in the DMAP address space, translate it into a physical address. */ -unsigned long -sim_d10v_translate_dmap_addr (unsigned long offset, +static unsigned long +sim_d10v_translate_dmap_addr (SIM_DESC sd, + SIM_CPU *cpu, + unsigned long offset, int nr_bytes, unsigned long *phys, - unsigned long (*dmap_register) (int reg_nr)) + void *regcache, + unsigned long (*dmap_register) (SIM_DESC, + SIM_CPU *, + void *regcache, + int reg_nr)) { short map; int regno; @@ -457,7 +405,7 @@ sim_d10v_translate_dmap_addr (unsigned long offset, /* Don't cross a BLOCK boundary */ nr_bytes = DMAP_BLOCK_SIZE - (offset % DMAP_BLOCK_SIZE); } - map = dmap_register (regno); + map = dmap_register (sd, cpu, regcache, regno); if (regno == 3) { /* Always maps to data memory */ @@ -494,11 +442,17 @@ sim_d10v_translate_dmap_addr (unsigned long offset, /* Given a virtual address in the IMAP address space, translate it into a physical address. */ -unsigned long -sim_d10v_translate_imap_addr (unsigned long offset, +static unsigned long +sim_d10v_translate_imap_addr (SIM_DESC sd, + SIM_CPU *cpu, + unsigned long offset, int nr_bytes, unsigned long *phys, - unsigned long (*imap_register) (int reg_nr)) + void *regcache, + unsigned long (*imap_register) (SIM_DESC, + SIM_CPU *, + void *regcache, + int reg_nr)) { short map; int regno; @@ -517,7 +471,7 @@ sim_d10v_translate_imap_addr (unsigned long offset, /* Don't cross a BLOCK boundary */ nr_bytes = IMAP_BLOCK_SIZE - offset; } - map = imap_register (regno); + map = imap_register (sd, cpu, regcache, regno); sp = (map & 0x3000) >> 12; segno = (map & 0x007f); switch (sp) @@ -545,12 +499,21 @@ sim_d10v_translate_imap_addr (unsigned long offset, return nr_bytes; } -unsigned long -sim_d10v_translate_addr (unsigned long memaddr, +static unsigned long +sim_d10v_translate_addr (SIM_DESC sd, + SIM_CPU *cpu, + unsigned long memaddr, int nr_bytes, unsigned long *targ_addr, - unsigned long (*dmap_register) (int reg_nr), - unsigned long (*imap_register) (int reg_nr)) + void *regcache, + unsigned long (*dmap_register) (SIM_DESC, + SIM_CPU *, + void *regcache, + int reg_nr), + unsigned long (*imap_register) (SIM_DESC, + SIM_CPU *, + void *regcache, + int reg_nr)) { unsigned long phys; unsigned long seg; @@ -614,13 +577,13 @@ sim_d10v_translate_addr (unsigned long memaddr, break; case 0x10: /* in logical data address segment */ - nr_bytes = sim_d10v_translate_dmap_addr (off, nr_bytes, &phys, - dmap_register); + nr_bytes = sim_d10v_translate_dmap_addr (sd, cpu, off, nr_bytes, &phys, + regcache, dmap_register); break; case 0x11: /* in logical instruction address segment */ - nr_bytes = sim_d10v_translate_imap_addr (off, nr_bytes, &phys, - imap_register); + nr_bytes = sim_d10v_translate_imap_addr (sd, cpu, off, nr_bytes, &phys, + regcache, imap_register); break; default: @@ -636,7 +599,7 @@ sim_d10v_translate_addr (unsigned long memaddr, isn't going to cross a segment boundary. */ uint8 * -map_memory (unsigned phys_addr) +map_memory (SIM_DESC sd, SIM_CPU *cpu, unsigned phys_addr) { uint8 **memory; uint8 *raw; @@ -682,18 +645,11 @@ map_memory (unsigned phys_addr) default: /* OOPS! */ last_segname = "scrap"; - return State.mem.fault; + sim_engine_halt (sd, cpu, NULL, PC, sim_stopped, SIM_SIGBUS); } if (*memory == NULL) - { - *memory = calloc (1, SEGMENT_SIZE); - if (*memory == NULL) - { - (*d10v_callback->printf_filtered) (d10v_callback, "Malloc failed.\n"); - return State.mem.fault; - } - } + *memory = xcalloc (1, SEGMENT_SIZE); offset = (phys_addr % SEGMENT_SIZE); raw = *memory + offset; @@ -708,96 +664,152 @@ map_memory (unsigned phys_addr) than aborting the entire run. */ static int -xfer_mem (SIM_ADDR virt, +xfer_mem (SIM_DESC sd, + SIM_ADDR virt, unsigned char *buffer, int size, int write_p) { - int xfered = 0; + uint8 *memory; + unsigned long phys; + int phys_size; + phys_size = sim_d10v_translate_addr (sd, NULL, virt, size, &phys, NULL, + dmap_register, imap_register); + if (phys_size == 0) + return 0; - while (xfered < size) - { - uint8 *memory; - unsigned long phys; - int phys_size; - phys_size = sim_d10v_translate_addr (virt, size, - &phys, - dmap_register, - imap_register); - if (phys_size == 0) - return xfered; - - memory = map_memory (phys); + memory = map_memory (sd, NULL, phys); #ifdef DEBUG - if ((d10v_debug & DEBUG_INSTRUCTION) != 0) - { - (*d10v_callback->printf_filtered) - (d10v_callback, - "sim_%s %d bytes: 0x%08lx (%s) -> 0x%08lx (%s) -> 0x%08lx (%s)\n", - (write_p ? "write" : "read"), - phys_size, virt, last_from, - phys, last_to, - (long) memory, last_segname); - } + if ((d10v_debug & DEBUG_INSTRUCTION) != 0) + { + sim_io_printf + (sd, + "sim_%s %d bytes: 0x%08lx (%s) -> 0x%08lx (%s) -> 0x%08lx (%s)\n", + write_p ? "write" : "read", + phys_size, virt, last_from, + phys, last_to, + (long) memory, last_segname); + } #endif - if (write_p) - { - memcpy (memory, buffer, phys_size); - } - else - { - memcpy (buffer, memory, phys_size); - } - - virt += phys_size; - buffer += phys_size; - xfered += phys_size; + if (write_p) + { + memcpy (memory, buffer, phys_size); } - - return size; + else + { + memcpy (buffer, memory, phys_size); + } + + return phys_size; } int -sim_write (sd, addr, buffer, size) - SIM_DESC sd; - SIM_ADDR addr; - unsigned char *buffer; - int size; +sim_write (SIM_DESC sd, SIM_ADDR addr, const unsigned char *buffer, int size) { /* FIXME: this should be performing a virtual transfer */ - return xfer_mem( addr, buffer, size, 1); + return xfer_mem (sd, addr, buffer, size, 1); } int -sim_read (sd, addr, buffer, size) - SIM_DESC sd; - SIM_ADDR addr; - unsigned char *buffer; - int size; +sim_read (SIM_DESC sd, SIM_ADDR addr, unsigned char *buffer, int size) { /* FIXME: this should be performing a virtual transfer */ - return xfer_mem( addr, buffer, size, 0); + return xfer_mem (sd, addr, buffer, size, 0); +} + +static sim_cia +d10v_pc_get (sim_cpu *cpu) +{ + return PC; +} + +static void +d10v_pc_set (sim_cpu *cpu, sim_cia pc) +{ + SIM_DESC sd = CPU_STATE (cpu); + SET_PC (pc); } +static void +free_state (SIM_DESC sd) +{ + if (STATE_MODULES (sd) != NULL) + sim_module_uninstall (sd); + sim_cpu_free_all (sd); + sim_state_free (sd); +} SIM_DESC -sim_open (kind, callback, abfd, argv) - SIM_OPEN_KIND kind; - host_callback *callback; - struct _bfd *abfd; - char **argv; +sim_open (SIM_OPEN_KIND kind, host_callback *cb, struct bfd *abfd, char **argv) { struct simops *s; struct hash_entry *h; static int init_p = 0; char **p; + int i; + SIM_DESC sd = sim_state_alloc (kind, cb); + SIM_ASSERT (STATE_MAGIC (sd) == SIM_MAGIC_NUMBER); + + /* The cpu data is kept in a separately allocated chunk of memory. */ + if (sim_cpu_alloc_all (sd, 1, /*cgen_cpu_max_extra_bytes ()*/0) != SIM_RC_OK) + { + free_state (sd); + return 0; + } + + if (sim_pre_argv_init (sd, argv[0]) != SIM_RC_OK) + { + free_state (sd); + return 0; + } + + /* getopt will print the error message so we just have to exit if this fails. + FIXME: Hmmm... in the case of gdb we need getopt to call + print_filtered. */ + if (sim_parse_args (sd, argv) != SIM_RC_OK) + { + free_state (sd); + return 0; + } + + /* Check for/establish the a reference program image. */ + if (sim_analyze_program (sd, + (STATE_PROG_ARGV (sd) != NULL + ? *STATE_PROG_ARGV (sd) + : NULL), abfd) != SIM_RC_OK) + { + free_state (sd); + return 0; + } + + /* Configure/verify the target byte order and other runtime + configuration options. */ + if (sim_config (sd) != SIM_RC_OK) + { + sim_module_uninstall (sd); + return 0; + } + + if (sim_post_argv_init (sd) != SIM_RC_OK) + { + /* Uninstall the modules to avoid memory leaks, + file descriptor leaks, etc. */ + sim_module_uninstall (sd); + return 0; + } + + /* CPU specific initialization. */ + for (i = 0; i < MAX_NR_PROCESSORS; ++i) + { + SIM_CPU *cpu = STATE_CPU (sd, i); + + CPU_PC_FETCH (cpu) = d10v_pc_get; + CPU_PC_STORE (cpu) = d10v_pc_set; + } - sim_kind = kind; - d10v_callback = callback; - myname = argv[0]; old_segment_mapping = 0; /* NOTE: This argument parsing is only effective when this function @@ -813,8 +825,6 @@ sim_open (kind, callback, abfd, argv) else if (strncmp (*p, "-t", 2) == 0) d10v_debug = atoi (*p + 2); #endif - else - (*d10v_callback->printf_filtered) (d10v_callback, "ERROR: unsupported option(s): %s\n",*p); } /* put all the opcodes in the hash table */ @@ -848,40 +858,11 @@ sim_open (kind, callback, abfd, argv) sim_size (1); sim_create_inferior ((SIM_DESC) 1, NULL, NULL, NULL); - /* Fudge our descriptor. */ - return (SIM_DESC) 1; -} - - -void -sim_close (sd, quitting) - SIM_DESC sd; - int quitting; -{ - if (prog_bfd != NULL && prog_bfd_was_opened_p) - { - bfd_close (prog_bfd); - prog_bfd = NULL; - prog_bfd_was_opened_p = 0; - } -} - -void -sim_set_profile (n) - int n; -{ - (*d10v_callback->printf_filtered) (d10v_callback, "sim_set_profile %d\n",n); -} - -void -sim_set_profile_size (n) - int n; -{ - (*d10v_callback->printf_filtered) (d10v_callback, "sim_set_profile_size %d\n",n); + return sd; } uint8 * -dmem_addr (uint16 offset) +dmem_addr (SIM_DESC sd, SIM_CPU *cpu, uint16 offset) { unsigned long phys; uint8 *mem; @@ -891,19 +872,16 @@ dmem_addr (uint16 offset) things like ``0xfffe + 0x0e60 == 0x10e5d''. Since offset's type is uint16 this is modulo'ed onto 0x0e5d. */ - phys_size = sim_d10v_translate_dmap_addr (offset, 1, &phys, + phys_size = sim_d10v_translate_dmap_addr (sd, cpu, offset, 1, &phys, NULL, dmap_register); if (phys_size == 0) - { - mem = State.mem.fault; - } - else - mem = map_memory (phys); + sim_engine_halt (sd, cpu, NULL, PC, sim_stopped, SIM_SIGBUS); + mem = map_memory (sd, cpu, phys); #ifdef DEBUG if ((d10v_debug & DEBUG_MEMORY)) { - (*d10v_callback->printf_filtered) - (d10v_callback, + sim_io_printf + (sd, "mem: 0x%08x (%s) -> 0x%08lx %d (%s) -> 0x%08lx (%s)\n", offset, last_from, phys, phys_size, last_to, @@ -914,21 +892,20 @@ dmem_addr (uint16 offset) } uint8 * -imem_addr (uint32 offset) +imem_addr (SIM_DESC sd, SIM_CPU *cpu, uint32 offset) { unsigned long phys; uint8 *mem; - int phys_size = sim_d10v_translate_imap_addr (offset, 1, &phys, imap_register); + int phys_size = sim_d10v_translate_imap_addr (sd, cpu, offset, 1, &phys, NULL, + imap_register); if (phys_size == 0) - { - return State.mem.fault; - } - mem = map_memory (phys); + sim_engine_halt (sd, cpu, NULL, PC, sim_stopped, SIM_SIGBUS); + mem = map_memory (sd, cpu, phys); #ifdef DEBUG if ((d10v_debug & DEBUG_MEMORY)) { - (*d10v_callback->printf_filtered) - (d10v_callback, + sim_io_printf + (sd, "mem: 0x%08x (%s) -> 0x%08lx %d (%s) -> 0x%08lx (%s)\n", offset, last_from, phys, phys_size, last_to, @@ -938,65 +915,15 @@ imem_addr (uint32 offset) return mem; } -static int stop_simulator = 0; - -int -sim_stop (sd) - SIM_DESC sd; -{ - stop_simulator = 1; - return 1; -} - - -/* Run (or resume) the program. */ -void -sim_resume (sd, step, siggnal) - SIM_DESC sd; - int step, siggnal; +static void +step_once (SIM_DESC sd, SIM_CPU *cpu) { uint32 inst; uint8 *iaddr; -/* (*d10v_callback->printf_filtered) (d10v_callback, "sim_resume (%d,%d) PC=0x%x\n",step,siggnal,PC); */ - State.exception = 0; - if (step) - sim_stop (sd); - - switch (siggnal) + /* TODO: Unindent this block. */ { - case 0: - break; -#ifdef SIGBUS - case SIGBUS: -#endif - case SIGSEGV: - SET_BPC (PC); - SET_BPSW (PSW); - SET_HW_PSW ((PSW & (PSW_F0_BIT | PSW_F1_BIT | PSW_C_BIT))); - JMP (AE_VECTOR_START); - SLOT_FLUSH (); - break; - case SIGILL: - SET_BPC (PC); - SET_BPSW (PSW); - SET_HW_PSW ((PSW & (PSW_F0_BIT | PSW_F1_BIT | PSW_C_BIT))); - JMP (RIE_VECTOR_START); - SLOT_FLUSH (); - break; - default: - /* just ignore it */ - break; - } - - do - { - iaddr = imem_addr ((uint32)PC << 2); - if (iaddr == State.mem.fault) - { - State.exception = SIGBUS; - break; - } + iaddr = imem_addr (sd, cpu, (uint32)PC << 2); inst = get_longword( iaddr ); @@ -1007,18 +934,18 @@ sim_resume (sd, step, siggnal) { case 0xC0000000: /* long instruction */ - do_long (inst & 0x3FFFFFFF); + do_long (sd, cpu, inst & 0x3FFFFFFF); break; case 0x80000000: /* R -> L */ - do_2_short ( inst & 0x7FFF, (inst & 0x3FFF8000) >> 15, RIGHT_FIRST); + do_2_short (sd, cpu, inst & 0x7FFF, (inst & 0x3FFF8000) >> 15, RIGHT_FIRST); break; case 0x40000000: /* L -> R */ - do_2_short ((inst & 0x3FFF8000) >> 15, inst & 0x7FFF, LEFT_FIRST); + do_2_short (sd, cpu, (inst & 0x3FFF8000) >> 15, inst & 0x7FFF, LEFT_FIRST); break; case 0: - do_parallel ((inst & 0x3FFF8000) >> 15, inst & 0x7FFF); + do_parallel (sd, cpu, (inst & 0x3FFF8000) >> 15, inst & 0x7FFF); break; } @@ -1062,33 +989,54 @@ sim_resume (sd, step, siggnal) /* Writeback all the DATA / PC changes */ SLOT_FLUSH (); - -#ifdef NEED_UI_LOOP_HOOK - if (ui_loop_hook != NULL && ui_loop_hook_counter-- < 0) - { - ui_loop_hook_counter = UI_LOOP_POLL_INTERVAL; - ui_loop_hook (0); - } -#endif /* NEED_UI_LOOP_HOOK */ } - while ( !State.exception && !stop_simulator); - - if (step && !State.exception) - State.exception = SIGTRAP; } void -sim_set_trace (void) +sim_engine_run (SIM_DESC sd, + int next_cpu_nr, /* ignore */ + int nr_cpus, /* ignore */ + int siggnal) { -#ifdef DEBUG - d10v_debug = DEBUG; -#endif + sim_cpu *cpu; + + SIM_ASSERT (STATE_MAGIC (sd) == SIM_MAGIC_NUMBER); + + cpu = STATE_CPU (sd, 0); + + switch (siggnal) + { + case 0: + break; + case GDB_SIGNAL_BUS: + SET_BPC (PC); + SET_BPSW (PSW); + SET_HW_PSW ((PSW & (PSW_F0_BIT | PSW_F1_BIT | PSW_C_BIT))); + JMP (AE_VECTOR_START); + SLOT_FLUSH (); + break; + case GDB_SIGNAL_ILL: + SET_BPC (PC); + SET_BPSW (PSW); + SET_HW_PSW ((PSW & (PSW_F0_BIT | PSW_F1_BIT | PSW_C_BIT))); + JMP (RIE_VECTOR_START); + SLOT_FLUSH (); + break; + default: + /* just ignore it */ + break; + } + + while (1) + { + step_once (sd, cpu); + if (sim_events_tick (sd)) + sim_events_process (sd); + } } void -sim_info (sd, verbose) - SIM_DESC sd; - int verbose; +sim_info (SIM_DESC sd, int verbose) { char buf1[40]; char buf2[40]; @@ -1125,101 +1073,86 @@ sim_info (sd, verbose) int nop_size = strlen (add_commas (buf1, sizeof (buf1), (left_nops > right_nops) ? left_nops : right_nops)); int normal_size = strlen (add_commas (buf1, sizeof (buf1), (left > right) ? left : right)); - (*d10v_callback->printf_filtered) (d10v_callback, - "executed %*s left instruction(s), %*s normal, %*s parallel, %*s EXExxx, %*s nops\n", - size, add_commas (buf1, sizeof (buf1), left_total), - normal_size, add_commas (buf2, sizeof (buf2), left), - parallel_size, add_commas (buf3, sizeof (buf3), left_parallel), - cond_size, add_commas (buf4, sizeof (buf4), left_cond), - nop_size, add_commas (buf5, sizeof (buf5), left_nops)); - - (*d10v_callback->printf_filtered) (d10v_callback, - "executed %*s right instruction(s), %*s normal, %*s parallel, %*s EXExxx, %*s nops\n", - size, add_commas (buf1, sizeof (buf1), right_total), - normal_size, add_commas (buf2, sizeof (buf2), right), - parallel_size, add_commas (buf3, sizeof (buf3), right_parallel), - cond_size, add_commas (buf4, sizeof (buf4), right_cond), - nop_size, add_commas (buf5, sizeof (buf5), right_nops)); + sim_io_printf (sd, + "executed %*s left instruction(s), %*s normal, %*s parallel, %*s EXExxx, %*s nops\n", + size, add_commas (buf1, sizeof (buf1), left_total), + normal_size, add_commas (buf2, sizeof (buf2), left), + parallel_size, add_commas (buf3, sizeof (buf3), left_parallel), + cond_size, add_commas (buf4, sizeof (buf4), left_cond), + nop_size, add_commas (buf5, sizeof (buf5), left_nops)); + + sim_io_printf (sd, + "executed %*s right instruction(s), %*s normal, %*s parallel, %*s EXExxx, %*s nops\n", + size, add_commas (buf1, sizeof (buf1), right_total), + normal_size, add_commas (buf2, sizeof (buf2), right), + parallel_size, add_commas (buf3, sizeof (buf3), right_parallel), + cond_size, add_commas (buf4, sizeof (buf4), right_cond), + nop_size, add_commas (buf5, sizeof (buf5), right_nops)); if (ins_long) - (*d10v_callback->printf_filtered) (d10v_callback, - "executed %*s long instruction(s)\n", - size, add_commas (buf1, sizeof (buf1), ins_long)); + sim_io_printf (sd, + "executed %*s long instruction(s)\n", + size, add_commas (buf1, sizeof (buf1), ins_long)); if (parallel) - (*d10v_callback->printf_filtered) (d10v_callback, - "executed %*s parallel instruction(s)\n", - size, add_commas (buf1, sizeof (buf1), parallel)); + sim_io_printf (sd, + "executed %*s parallel instruction(s)\n", + size, add_commas (buf1, sizeof (buf1), parallel)); if (leftright) - (*d10v_callback->printf_filtered) (d10v_callback, - "executed %*s instruction(s) encoded L->R\n", - size, add_commas (buf1, sizeof (buf1), leftright)); + sim_io_printf (sd, + "executed %*s instruction(s) encoded L->R\n", + size, add_commas (buf1, sizeof (buf1), leftright)); if (rightleft) - (*d10v_callback->printf_filtered) (d10v_callback, - "executed %*s instruction(s) encoded R->L\n", - size, add_commas (buf1, sizeof (buf1), rightleft)); + sim_io_printf (sd, + "executed %*s instruction(s) encoded R->L\n", + size, add_commas (buf1, sizeof (buf1), rightleft)); if (unknown) - (*d10v_callback->printf_filtered) (d10v_callback, - "executed %*s unknown instruction(s)\n", - size, add_commas (buf1, sizeof (buf1), unknown)); + sim_io_printf (sd, + "executed %*s unknown instruction(s)\n", + size, add_commas (buf1, sizeof (buf1), unknown)); if (cond_true) - (*d10v_callback->printf_filtered) (d10v_callback, - "executed %*s instruction(s) due to EXExxx condition being true\n", - size, add_commas (buf1, sizeof (buf1), cond_true)); + sim_io_printf (sd, + "executed %*s instruction(s) due to EXExxx condition being true\n", + size, add_commas (buf1, sizeof (buf1), cond_true)); if (cond_false) - (*d10v_callback->printf_filtered) (d10v_callback, - "skipped %*s instruction(s) due to EXExxx condition being false\n", - size, add_commas (buf1, sizeof (buf1), cond_false)); + sim_io_printf (sd, + "skipped %*s instruction(s) due to EXExxx condition being false\n", + size, add_commas (buf1, sizeof (buf1), cond_false)); if (cond_jump) - (*d10v_callback->printf_filtered) (d10v_callback, - "skipped %*s instruction(s) due to conditional branch succeeding\n", - size, add_commas (buf1, sizeof (buf1), cond_jump)); + sim_io_printf (sd, + "skipped %*s instruction(s) due to conditional branch succeeding\n", + size, add_commas (buf1, sizeof (buf1), cond_jump)); - (*d10v_callback->printf_filtered) (d10v_callback, - "executed %*s cycle(s)\n", - size, add_commas (buf1, sizeof (buf1), cycles)); + sim_io_printf (sd, + "executed %*s cycle(s)\n", + size, add_commas (buf1, sizeof (buf1), cycles)); - (*d10v_callback->printf_filtered) (d10v_callback, - "executed %*s total instructions\n", - size, add_commas (buf1, sizeof (buf1), total)); + sim_io_printf (sd, + "executed %*s total instructions\n", + size, add_commas (buf1, sizeof (buf1), total)); } SIM_RC -sim_create_inferior (sd, abfd, argv, env) - SIM_DESC sd; - struct _bfd *abfd; - char **argv; - char **env; +sim_create_inferior (SIM_DESC sd, struct bfd *abfd, char **argv, char **env) { bfd_vma start_address; /* reset all state information */ - memset (&State.regs, 0, (int)&State.mem - (int)&State.regs); + memset (&State.regs, 0, (uintptr_t)&State.mem - (uintptr_t)&State.regs); - if (argv) - { - /* a hack to set r0/r1 with argc/argv */ - /* some high memory that won't be overwritten by the stack soon */ - bfd_vma addr = 0x7C00; - int p = 20; - int i = 0; - while (argv[i]) - { - int size = strlen (argv[i]) + 1; - SW (addr + 2*i, addr + p); - sim_write (sd, addr + 0, argv[i], size); - p += size; - i++; - } - SET_GPR (0, addr); - SET_GPR (1, i); - } + /* There was a hack here to copy the values of argc and argv into r0 + and r1. The values were also saved into some high memory that + won't be overwritten by the stack (0x7C00). The reason for doing + this was to allow the 'run' program to accept arguments. Without + the hack, this is not possible anymore. If the simulator is run + from the debugger, arguments cannot be passed in, so this makes + no difference. */ /* set PC */ if (abfd != NULL) @@ -1228,9 +1161,12 @@ sim_create_inferior (sd, abfd, argv, env) start_address = 0xffc0 << 2; #ifdef DEBUG if (d10v_debug) - (*d10v_callback->printf_filtered) (d10v_callback, "sim_create_inferior: PC=0x%lx\n", (long) start_address); + sim_io_printf (sd, "sim_create_inferior: PC=0x%lx\n", (long) start_address); #endif - SET_CREG (PC_CR, start_address >> 2); + { + SIM_CPU *cpu = STATE_CPU (sd, 0); + SET_CREG (PC_CR, start_address >> 2); + } /* cpu resets imap0 to 0 and imap1 to 0x7f, but D10V-EVA board initializes imap0 and imap1 to 0x1000 as part of its ROM @@ -1238,223 +1174,192 @@ sim_create_inferior (sd, abfd, argv, env) if (old_segment_mapping) { /* External memory startup. This is the HARD reset state. */ - set_imap_register (0, 0x0000); - set_imap_register (1, 0x007f); - set_dmap_register (0, 0x2000); - set_dmap_register (1, 0x2000); - set_dmap_register (2, 0x0000); /* Old DMAP */ - set_dmap_register (3, 0x0000); + set_imap_register (sd, 0, 0x0000); + set_imap_register (sd, 1, 0x007f); + set_dmap_register (sd, 0, 0x2000); + set_dmap_register (sd, 1, 0x2000); + set_dmap_register (sd, 2, 0x0000); /* Old DMAP */ + set_dmap_register (sd, 3, 0x0000); } else { /* Internal memory startup. This is the ROM intialized state. */ - set_imap_register (0, 0x1000); - set_imap_register (1, 0x1000); - set_dmap_register (0, 0x2000); - set_dmap_register (1, 0x2000); - set_dmap_register (2, 0x2000); /* DMAP2 initial internal value is - 0x2000 on the new board. */ - set_dmap_register (3, 0x0000); + set_imap_register (sd, 0, 0x1000); + set_imap_register (sd, 1, 0x1000); + set_dmap_register (sd, 0, 0x2000); + set_dmap_register (sd, 1, 0x2000); + set_dmap_register (sd, 2, 0x2000); /* DMAP2 initial internal value is + 0x2000 on the new board. */ + set_dmap_register (sd, 3, 0x0000); } SLOT_FLUSH (); return SIM_RC_OK; } - -void -sim_set_callbacks (p) - host_callback *p; -{ - d10v_callback = p; -} - -void -sim_stop_reason (sd, reason, sigrc) - SIM_DESC sd; - enum sim_stop *reason; - int *sigrc; -{ -/* (*d10v_callback->printf_filtered) (d10v_callback, "sim_stop_reason: PC=0x%x\n",PC<<2); */ - - switch (State.exception) - { - case SIG_D10V_STOP: /* stop instruction */ - *reason = sim_exited; - *sigrc = 0; - break; - - case SIG_D10V_EXIT: /* exit trap */ - *reason = sim_exited; - *sigrc = GPR (0); - break; - - case SIG_D10V_BUS: - *reason = sim_stopped; -#ifdef SIGBUS - *sigrc = SIGBUS; -#else - *sigrc = SIGSEGV; -#endif - break; - - default: /* some signal */ - *reason = sim_stopped; - if (stop_simulator && !State.exception) - *sigrc = SIGINT; - else - *sigrc = State.exception; - break; - } - - stop_simulator = 0; -} - int -sim_fetch_register (sd, rn, memory, length) - SIM_DESC sd; - int rn; - unsigned char *memory; - int length; +sim_fetch_register (SIM_DESC sd, int rn, unsigned char *memory, int length) { + SIM_CPU *cpu = STATE_CPU (sd, 0); int size; - if (rn < 0) - size = 0; - else if (rn >= SIM_D10V_R0_REGNUM - && rn < SIM_D10V_R0_REGNUM + SIM_D10V_NR_R_REGS) + switch ((enum sim_d10v_regs) rn) { + case SIM_D10V_R0_REGNUM: + case SIM_D10V_R1_REGNUM: + case SIM_D10V_R2_REGNUM: + case SIM_D10V_R3_REGNUM: + case SIM_D10V_R4_REGNUM: + case SIM_D10V_R5_REGNUM: + case SIM_D10V_R6_REGNUM: + case SIM_D10V_R7_REGNUM: + case SIM_D10V_R8_REGNUM: + case SIM_D10V_R9_REGNUM: + case SIM_D10V_R10_REGNUM: + case SIM_D10V_R11_REGNUM: + case SIM_D10V_R12_REGNUM: + case SIM_D10V_R13_REGNUM: + case SIM_D10V_R14_REGNUM: + case SIM_D10V_R15_REGNUM: WRITE_16 (memory, GPR (rn - SIM_D10V_R0_REGNUM)); size = 2; - } - else if (rn >= SIM_D10V_CR0_REGNUM - && rn < SIM_D10V_CR0_REGNUM + SIM_D10V_NR_CR_REGS) - { + break; + case SIM_D10V_CR0_REGNUM: + case SIM_D10V_CR1_REGNUM: + case SIM_D10V_CR2_REGNUM: + case SIM_D10V_CR3_REGNUM: + case SIM_D10V_CR4_REGNUM: + case SIM_D10V_CR5_REGNUM: + case SIM_D10V_CR6_REGNUM: + case SIM_D10V_CR7_REGNUM: + case SIM_D10V_CR8_REGNUM: + case SIM_D10V_CR9_REGNUM: + case SIM_D10V_CR10_REGNUM: + case SIM_D10V_CR11_REGNUM: + case SIM_D10V_CR12_REGNUM: + case SIM_D10V_CR13_REGNUM: + case SIM_D10V_CR14_REGNUM: + case SIM_D10V_CR15_REGNUM: WRITE_16 (memory, CREG (rn - SIM_D10V_CR0_REGNUM)); size = 2; - } - else if (rn >= SIM_D10V_A0_REGNUM - && rn < SIM_D10V_A0_REGNUM + SIM_D10V_NR_A_REGS) - { + break; + case SIM_D10V_A0_REGNUM: + case SIM_D10V_A1_REGNUM: WRITE_64 (memory, ACC (rn - SIM_D10V_A0_REGNUM)); size = 8; - } - else if (rn == SIM_D10V_SPI_REGNUM) - { + break; + case SIM_D10V_SPI_REGNUM: /* PSW_SM indicates that the current SP is the USER stack-pointer. */ WRITE_16 (memory, spi_register ()); size = 2; - } - else if (rn == SIM_D10V_SPU_REGNUM) - { + break; + case SIM_D10V_SPU_REGNUM: /* PSW_SM indicates that the current SP is the USER stack-pointer. */ WRITE_16 (memory, spu_register ()); size = 2; - } - else if (rn >= SIM_D10V_IMAP0_REGNUM - && rn < SIM_D10V_IMAP0_REGNUM + SIM_D10V_NR_IMAP_REGS) - { - WRITE_16 (memory, imap_register (rn - SIM_D10V_IMAP0_REGNUM)); + break; + case SIM_D10V_IMAP0_REGNUM: + case SIM_D10V_IMAP1_REGNUM: + WRITE_16 (memory, imap_register (sd, cpu, NULL, rn - SIM_D10V_IMAP0_REGNUM)); size = 2; - } - else if (rn >= SIM_D10V_DMAP0_REGNUM - && rn < SIM_D10V_DMAP0_REGNUM + SIM_D10V_NR_DMAP_REGS) - { - WRITE_16 (memory, dmap_register (rn - SIM_D10V_DMAP0_REGNUM)); + break; + case SIM_D10V_DMAP0_REGNUM: + case SIM_D10V_DMAP1_REGNUM: + case SIM_D10V_DMAP2_REGNUM: + case SIM_D10V_DMAP3_REGNUM: + WRITE_16 (memory, dmap_register (sd, cpu, NULL, rn - SIM_D10V_DMAP0_REGNUM)); size = 2; + break; + case SIM_D10V_TS2_DMAP_REGNUM: + size = 0; + break; + default: + size = 0; + break; } - else - size = 0; return size; } int -sim_store_register (sd, rn, memory, length) - SIM_DESC sd; - int rn; - unsigned char *memory; - int length; +sim_store_register (SIM_DESC sd, int rn, unsigned char *memory, int length) { + SIM_CPU *cpu = STATE_CPU (sd, 0); int size; - if (rn < 0) - size = 0; - else if (rn >= SIM_D10V_R0_REGNUM - && rn < SIM_D10V_R0_REGNUM + SIM_D10V_NR_R_REGS) + switch ((enum sim_d10v_regs) rn) { + case SIM_D10V_R0_REGNUM: + case SIM_D10V_R1_REGNUM: + case SIM_D10V_R2_REGNUM: + case SIM_D10V_R3_REGNUM: + case SIM_D10V_R4_REGNUM: + case SIM_D10V_R5_REGNUM: + case SIM_D10V_R6_REGNUM: + case SIM_D10V_R7_REGNUM: + case SIM_D10V_R8_REGNUM: + case SIM_D10V_R9_REGNUM: + case SIM_D10V_R10_REGNUM: + case SIM_D10V_R11_REGNUM: + case SIM_D10V_R12_REGNUM: + case SIM_D10V_R13_REGNUM: + case SIM_D10V_R14_REGNUM: + case SIM_D10V_R15_REGNUM: SET_GPR (rn - SIM_D10V_R0_REGNUM, READ_16 (memory)); size = 2; - } - else if (rn >= SIM_D10V_CR0_REGNUM - && rn < SIM_D10V_CR0_REGNUM + SIM_D10V_NR_CR_REGS) - { + break; + case SIM_D10V_CR0_REGNUM: + case SIM_D10V_CR1_REGNUM: + case SIM_D10V_CR2_REGNUM: + case SIM_D10V_CR3_REGNUM: + case SIM_D10V_CR4_REGNUM: + case SIM_D10V_CR5_REGNUM: + case SIM_D10V_CR6_REGNUM: + case SIM_D10V_CR7_REGNUM: + case SIM_D10V_CR8_REGNUM: + case SIM_D10V_CR9_REGNUM: + case SIM_D10V_CR10_REGNUM: + case SIM_D10V_CR11_REGNUM: + case SIM_D10V_CR12_REGNUM: + case SIM_D10V_CR13_REGNUM: + case SIM_D10V_CR14_REGNUM: + case SIM_D10V_CR15_REGNUM: SET_CREG (rn - SIM_D10V_CR0_REGNUM, READ_16 (memory)); size = 2; - } - else if (rn >= SIM_D10V_A0_REGNUM - && rn < SIM_D10V_A0_REGNUM + SIM_D10V_NR_A_REGS) - { + break; + case SIM_D10V_A0_REGNUM: + case SIM_D10V_A1_REGNUM: SET_ACC (rn - SIM_D10V_A0_REGNUM, READ_64 (memory) & MASK40); size = 8; - } - else if (rn == SIM_D10V_SPI_REGNUM) - { + break; + case SIM_D10V_SPI_REGNUM: /* PSW_SM indicates that the current SP is the USER stack-pointer. */ set_spi_register (READ_16 (memory)); size = 2; - } - else if (rn == SIM_D10V_SPU_REGNUM) - { + break; + case SIM_D10V_SPU_REGNUM: set_spu_register (READ_16 (memory)); size = 2; - } - else if (rn >= SIM_D10V_IMAP0_REGNUM - && rn < SIM_D10V_IMAP0_REGNUM + SIM_D10V_NR_IMAP_REGS) - { - set_imap_register (rn - SIM_D10V_IMAP0_REGNUM, READ_16(memory)); + break; + case SIM_D10V_IMAP0_REGNUM: + case SIM_D10V_IMAP1_REGNUM: + set_imap_register (sd, rn - SIM_D10V_IMAP0_REGNUM, READ_16(memory)); size = 2; - } - else if (rn >= SIM_D10V_DMAP0_REGNUM - && rn < SIM_D10V_DMAP0_REGNUM + SIM_D10V_NR_DMAP_REGS) - { - set_dmap_register (rn - SIM_D10V_DMAP0_REGNUM, READ_16(memory)); + break; + case SIM_D10V_DMAP0_REGNUM: + case SIM_D10V_DMAP1_REGNUM: + case SIM_D10V_DMAP2_REGNUM: + case SIM_D10V_DMAP3_REGNUM: + set_dmap_register (sd, rn - SIM_D10V_DMAP0_REGNUM, READ_16(memory)); size = 2; + break; + case SIM_D10V_TS2_DMAP_REGNUM: + size = 0; + break; + default: + size = 0; + break; } - else - size = 0; SLOT_FLUSH (); return size; } - - -void -sim_do_command (sd, cmd) - SIM_DESC sd; - char *cmd; -{ - (*d10v_callback->printf_filtered) (d10v_callback, "sim_do_command: %s\n",cmd); -} - -SIM_RC -sim_load (sd, prog, abfd, from_tty) - SIM_DESC sd; - char *prog; - bfd *abfd; - int from_tty; -{ - extern bfd *sim_load_file (); /* ??? Don't know where this should live. */ - - if (prog_bfd != NULL && prog_bfd_was_opened_p) - { - bfd_close (prog_bfd); - prog_bfd_was_opened_p = 0; - } - prog_bfd = sim_load_file (sd, myname, d10v_callback, prog, abfd, - sim_kind == SIM_OPEN_DEBUG, - 1/*LMA*/, sim_write); - if (prog_bfd == NULL) - return SIM_RC_FAIL; - prog_bfd_was_opened_p = abfd == NULL; - return SIM_RC_OK; -}