]>
git.ipfire.org Git - thirdparty/glibc.git/commit - ChangeLog
Speed up the ARM fenv implementation by avoiding unnecessary FPSCR
writes if the FPSCR remains unchanged.
2014-06-24 Wilco <wdijkstr@arm.com>
* sysdeps/arm/fclrexcpt.c (feclearexcept):
Optimize to avoid unnecessary FPSCR writes.
* sysdeps/arm/fedisblxcpt.c (fedisableexcept): Likewise.
* sysdeps/arm/feenablxcpt.c (feenableexcept): Likewise.
* sysdeps/arm/fsetexcptflg.c (fesetexceptflag): Likewise.
* sysdeps/arm/setfpucw.c (__setfpucw): Likewise.