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author	Adhemerval Zanella <azanella@linux.vnet.ibm.com>
	Fri, 7 Mar 2014 12:09:47 +0000 (06:09 -0600)
committer	Adhemerval Zanella <azanella@linux.vnet.ibm.com>
	Mon, 10 Mar 2014 12:25:09 +0000 (07:25 -0500)
commit	ba9cc0714e58a9e8fa73cf6b0e205cbf1e6b71f2
tree	f22f21e3972b49599186258fb2e748af8405a880	tree \| snapshot
parent	8b4ff97413fc32ea7f817586bc682ff2cc34527b	commit \| diff

PowerPC: strncat optimization for PPC64

The optimization is achieved by following techniques:
1. Doubleword aligned memory access and compares using
cmpb instruction.
2. Loop unrolling for byte load/store.
3. CPU pre-fetch to avoid cache miss.

ChangeLog		diff \| blob \| blame \| history
sysdeps/powerpc/powerpc64/multiarch/Makefile		diff \| blob \| blame \| history
sysdeps/powerpc/powerpc64/multiarch/ifunc-impl-list.c		diff \| blob \| blame \| history
sysdeps/powerpc/powerpc64/multiarch/strncat-power7.S	[new file with mode: 0644]	blob
sysdeps/powerpc/powerpc64/multiarch/strncat-ppc64.c	[new file with mode: 0644]	blob
sysdeps/powerpc/powerpc64/multiarch/strncat.c	[new file with mode: 0644]	blob
sysdeps/powerpc/powerpc64/power7/strncat.S	[new file with mode: 0644]	blob

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