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author	Yunhui Cui <yunhui.cui@nxp.com>
	Wed, 8 Jun 2016 02:31:42 +0000 (10:31 +0800)
committer	York Sun <york.sun@nxp.com>
	Fri, 10 Jun 2016 20:43:12 +0000 (13:43 -0700)
commit	a758177f9b9a567df2e8e6e57ac905ada24d8d9c
tree	b618ee8928ad9a9ff004a174d120f3066e3006e7	tree \| snapshot
parent	6b3943f1b04be60f147ee540fbd72c4c7ea89f80	commit \| diff

armv8/ls2080a: configure PMU's PCTBENR to enable WDT

The SP805-WDT module on LS2080A requires configuration of PMU's
PCTBENR register to enable watchdog counter decrement and reset
signal generation. The watchdog clock needs to be enabled first.

Signed-off-by: Yunhui Cui <yunhui.cui@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>

arch/arm/cpu/armv8/fsl-layerscape/cpu.c		diff \| blob \| blame \| history
arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h		diff \| blob \| blame \| history

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