[Morello] Loads and stores with alternate base

[Morello] Loads and stores with alternate base

These are loads that use a capability base register in A64 and 64-bit
integer register in C64.

This patch implements LDAR, LDARB, STLR and STLRB.

gas/ChangeLog:

2020-10-20  Siddhesh Poyarekar  <siddesh.poyarekar@arm.com>

	* config/tc-aarch64.c (parse_operands): Add Wt.
	* testsuite/gas/aarch64/morello_ldst-c64.d: Add tests.
	* testsuite/gas/aarch64/morello_ldst.d: Likewise.
	* testsuite/gas/aarch64/morello_ldst.s: Likewise.

include/ChangeLog:

2020-10-20  Siddhesh Poyarekar  <siddesh.poyarekar@arm.com>

	* opcode/aarch64.h (aarch64_opnd): Add Wt.

opcodes/ChangeLog:

2020-10-20  Siddhesh Poyarekar  <siddesh.poyarekar@arm.com>

	* aarch64-opc.c (get_altbase_reg_name): New function.
	(aarch64_print_operand): Use it.  Add Wt.
	* aarch64-tbl.h (QL2_A64C_W_CAPADDR): New macro.
	(aarch64_opcode_table): Add instructions.
	(AARCH64_OPERANDS): New operand.
	* aarch64-asm-2.c: Regenerate.
	* aarch64-dis-2.c: Regenerate.
	* aarch64-opc-2.c: Regenerate.