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[ARM][GCC][12x]: MVE ACLE intrinsics to set and get vector lane.
authorSrinath Parvathaneni <srinath.parvathaneni@arm.com>
Mon, 23 Mar 2020 18:12:14 +0000 (18:12 +0000)
committerKyrylo Tkachov <kyrylo.tkachov@arm.com>
Mon, 23 Mar 2020 18:12:14 +0000 (18:12 +0000)
commit1a5c27b1b43a15ad7922311f00f0d176b580298e
treeb53f366c8bf2eaedb8cc01f42e646fc09ccac87ftree | snapshot
parent0cd55f9d3afdc8d9220ef0cb20db61a3b86b4c8acommit | diff
[ARM][GCC][12x]: MVE ACLE intrinsics to set and get vector lane.

This patch supports following MVE ACLE intrinsics to get and set vector lane.

vsetq_lane_f16, vsetq_lane_f32, vsetq_lane_s16, vsetq_lane_s32, vsetq_lane_s8, vsetq_lane_s64, vsetq_lane_u8, vsetq_lane_u16, vsetq_lane_u32, vsetq_lane_u64, vgetq_lane_f16, vgetq_lane_f32, vgetq_lane_s16, vgetq_lane_s32, vgetq_lane_s8, vgetq_lane_s64, vgetq_lane_u8, vgetq_lane_u16, vgetq_lane_u32, vgetq_lane_u64.

Please refer to M-profile Vector Extension (MVE) intrinsics [1]  for more details.
[1] https://developer.arm.com/architectures/instruction-sets/simd-isas/helium/mve-intrinsics

2020-03-23  Srinath Parvathaneni  <srinath.parvathaneni@arm.com>
            Andre Vieira  <andre.simoesdiasvieira@arm.com>
            Mihail Ionescu  <mihail.ionescu@arm.com>

* config/arm/arm_mve.h (vsetq_lane_f16): Define macro.
(vsetq_lane_f32): Likewise.
(vsetq_lane_s16): Likewise.
(vsetq_lane_s32): Likewise.
(vsetq_lane_s8): Likewise.
(vsetq_lane_s64): Likewise.
(vsetq_lane_u8): Likewise.
(vsetq_lane_u16): Likewise.
(vsetq_lane_u32): Likewise.
(vsetq_lane_u64): Likewise.
(vgetq_lane_f16): Likewise.
(vgetq_lane_f32): Likewise.
(vgetq_lane_s16): Likewise.
(vgetq_lane_s32): Likewise.
(vgetq_lane_s8): Likewise.
(vgetq_lane_s64): Likewise.
(vgetq_lane_u8): Likewise.
(vgetq_lane_u16): Likewise.
(vgetq_lane_u32): Likewise.
(vgetq_lane_u64): Likewise.
(__ARM_NUM_LANES): Likewise.
(__ARM_LANEQ): Likewise.
(__ARM_CHECK_LANEQ): Likewise.
(__arm_vsetq_lane_s16): Define intrinsic.
(__arm_vsetq_lane_s32): Likewise.
(__arm_vsetq_lane_s8): Likewise.
(__arm_vsetq_lane_s64): Likewise.
(__arm_vsetq_lane_u8): Likewise.
(__arm_vsetq_lane_u16): Likewise.
(__arm_vsetq_lane_u32): Likewise.
(__arm_vsetq_lane_u64): Likewise.
(__arm_vgetq_lane_s16): Likewise.
(__arm_vgetq_lane_s32): Likewise.
(__arm_vgetq_lane_s8): Likewise.
(__arm_vgetq_lane_s64): Likewise.
(__arm_vgetq_lane_u8): Likewise.
(__arm_vgetq_lane_u16): Likewise.
(__arm_vgetq_lane_u32): Likewise.
(__arm_vgetq_lane_u64): Likewise.
(__arm_vsetq_lane_f16): Likewise.
(__arm_vsetq_lane_f32): Likewise.
(__arm_vgetq_lane_f16): Likewise.
(__arm_vgetq_lane_f32): Likewise.
(vgetq_lane): Define polymorphic variant.
(vsetq_lane): Likewise.
* config/arm/mve.md (mve_vec_extract<mode><V_elem_l>): Define RTL
pattern.
(mve_vec_extractv2didi): Likewise.
(mve_vec_extract_sext_internal<mode>): Likewise.
(mve_vec_extract_zext_internal<mode>): Likewise.
(mve_vec_set<mode>_internal): Likewise.
(mve_vec_setv2di_internal): Likewise.
* config/arm/neon.md (vec_set<mode>): Move RTL pattern to vec-common.md
file.
(vec_extract<mode><V_elem_l>): Rename to
"neon_vec_extract<mode><V_elem_l>".
(vec_extractv2didi): Rename to "neon_vec_extractv2didi".
* config/arm/vec-common.md (vec_extract<mode><V_elem_l>): Define RTL
pattern common for MVE and NEON.
(vec_set<mode>): Move RTL pattern from neon.md and modify to accept both
MVE and NEON.

gcc/testsuite/ChangeLog:

2020-03-23  Srinath Parvathaneni  <srinath.parvathaneni@arm.com>
            Andre Vieira  <andre.simoesdiasvieira@arm.com>
            Mihail Ionescu  <mihail.ionescu@arm.com>

* gcc.target/arm/mve/intrinsics/vgetq_lane_f16.c: New test.
* gcc.target/arm/mve/intrinsics/vgetq_lane_f32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vgetq_lane_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vgetq_lane_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vgetq_lane_s64.c: Likewise.
* gcc.target/arm/mve/intrinsics/vgetq_lane_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vgetq_lane_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vgetq_lane_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vgetq_lane_u64.c: Likewise.
* gcc.target/arm/mve/intrinsics/vgetq_lane_u8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vsetq_lane_f16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vsetq_lane_f32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vsetq_lane_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vsetq_lane_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vsetq_lane_s64.c: Likewise.
* gcc.target/arm/mve/intrinsics/vsetq_lane_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vsetq_lane_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vsetq_lane_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vsetq_lane_u64.c: Likewise.
* gcc.target/arm/mve/intrinsics/vsetq_lane_u8.c: Likewise.
27 files changed:
gcc/ChangeLog diff | blob | blame | history
gcc/config/arm/arm_mve.h diff | blob | blame | history
gcc/config/arm/iterators.md diff | blob | blame | history
gcc/config/arm/mve.md diff | blob | blame | history
gcc/config/arm/neon.md diff | blob | blame | history
gcc/config/arm/vec-common.md diff | blob | blame | history
gcc/testsuite/ChangeLog diff | blob | blame | history
gcc/testsuite/gcc.target/arm/mve/intrinsics/vgetq_lane_f16.c [new file with mode: 0644] blob
gcc/testsuite/gcc.target/arm/mve/intrinsics/vgetq_lane_f32.c [new file with mode: 0644] blob
gcc/testsuite/gcc.target/arm/mve/intrinsics/vgetq_lane_s16.c [new file with mode: 0644] blob
gcc/testsuite/gcc.target/arm/mve/intrinsics/vgetq_lane_s32.c [new file with mode: 0644] blob
gcc/testsuite/gcc.target/arm/mve/intrinsics/vgetq_lane_s64.c [new file with mode: 0644] blob
gcc/testsuite/gcc.target/arm/mve/intrinsics/vgetq_lane_s8.c [new file with mode: 0644] blob
gcc/testsuite/gcc.target/arm/mve/intrinsics/vgetq_lane_u16.c [new file with mode: 0644] blob
gcc/testsuite/gcc.target/arm/mve/intrinsics/vgetq_lane_u32.c [new file with mode: 0644] blob
gcc/testsuite/gcc.target/arm/mve/intrinsics/vgetq_lane_u64.c [new file with mode: 0644] blob
gcc/testsuite/gcc.target/arm/mve/intrinsics/vgetq_lane_u8.c [new file with mode: 0644] blob
gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_f16.c [new file with mode: 0644] blob
gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_f32.c [new file with mode: 0644] blob
gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_s16.c [new file with mode: 0644] blob
gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_s32.c [new file with mode: 0644] blob
gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_s64.c [new file with mode: 0644] blob
gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_s8.c [new file with mode: 0644] blob
gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_u16.c [new file with mode: 0644] blob
gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_u32.c [new file with mode: 0644] blob
gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_u64.c [new file with mode: 0644] blob
gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_u8.c [new file with mode: 0644] blob
Mirror of https://gcc.gnu.org/git/gcc.git