RISC-V: Add autovec sign/zero extension and truncation.

RISC-V: Add autovec sign/zero extension and truncation.

This patch implements the autovec expanders for sign and zero extension
patterns as well as the accompanying truncations.  In order to use them
additional mode_attr iterators as well as vectorizer hooks are required.
Using these hooks we can e.g. vectorize with VNx4QImode as base mode
and extend VNx4SI to VNx4DI.  They are still going to be expanded in the
future.

vf4 and vf8 truncations are emulated by truncating two and three times
respectively.

The patch also adds tests and changes some expectations for already
existing ones.

Combine does not yet handle binary operations of two widened operands
as we are missing the necessary split/rewrite patterns.  These will be
added at a later time.

Co-authored-by: Juzhe Zhong <juzhe.zhong@rivai.ai>
gcc/ChangeLog:

	* config/riscv/autovec.md (<optab><v_double_trunc><mode>2): New
	expander.
	(<optab><v_quad_trunc><mode>2): Dito.
	(<optab><v_oct_trunc><mode>2): Dito.
	(trunc<mode><v_double_trunc>2): Dito.
	(trunc<mode><v_quad_trunc>2): Dito.
	(trunc<mode><v_oct_trunc>2): Dito.
	* config/riscv/riscv-protos.h (vectorize_related_mode): Define.
	(autovectorize_vector_modes): Define.
	* config/riscv/riscv-v.cc (vectorize_related_mode): Implement
	hook.
	(autovectorize_vector_modes): Implement hook.
	* config/riscv/riscv.cc (riscv_autovectorize_vector_modes):
	Implement target hook.
	(riscv_vectorize_related_mode): Implement target hook.
	(TARGET_VECTORIZE_AUTOVECTORIZE_VECTOR_MODES): Define.
	(TARGET_VECTORIZE_RELATED_MODE): Define.
	* config/riscv/vector-iterators.md: Add lowercase versions of
	mode_attr iterators.

gcc/testsuite/ChangeLog:

	* gcc.target/riscv/rvv/autovec/binop/shift-rv32gcv.c: Adjust
	expectation.
	* gcc.target/riscv/rvv/autovec/binop/shift-rv64gcv.c: Dito.
	* gcc.target/riscv/rvv/autovec/binop/vdiv-run.c: Dito.
	* gcc.target/riscv/rvv/autovec/binop/vdiv-rv32gcv.c: Dito.
	* gcc.target/riscv/rvv/autovec/binop/vdiv-rv64gcv.c: Dito.
	* gcc.target/riscv/rvv/autovec/binop/vdiv-template.h: Dito.
	* gcc.target/riscv/rvv/autovec/binop/vrem-rv32gcv.c: Dito.
	* gcc.target/riscv/rvv/autovec/binop/vrem-rv64gcv.c: Dito.
	* gcc.target/riscv/rvv/autovec/zve32f_zvl128b-2.c: Dito.
	* gcc.target/riscv/rvv/autovec/zve32x_zvl128b-2.c: Dito.
	* gcc.target/riscv/rvv/autovec/zve64d-2.c: Dito.
	* gcc.target/riscv/rvv/autovec/zve64f-2.c: Dito.
	* gcc.target/riscv/rvv/autovec/zve64x-2.c: Dito.
	* gcc.target/riscv/rvv/rvv.exp: Add new conversion tests.
	* gcc.target/riscv/rvv/vsetvl/avl_single-38.c: Do not vectorize.
	* gcc.target/riscv/rvv/vsetvl/avl_single-47.c: Dito.
	* gcc.target/riscv/rvv/vsetvl/avl_single-48.c: Dito.
	* gcc.target/riscv/rvv/vsetvl/avl_single-49.c: Dito.
	* gcc.target/riscv/rvv/vsetvl/imm_switch-8.c: Dito.
	* gcc.target/riscv/rvv/autovec/conversions/vncvt-run.c: New test.
	* gcc.target/riscv/rvv/autovec/conversions/vncvt-rv32gcv.c: New test.
	* gcc.target/riscv/rvv/autovec/conversions/vncvt-rv64gcv.c: New test.
	* gcc.target/riscv/rvv/autovec/conversions/vncvt-template.h: New test.
	* gcc.target/riscv/rvv/autovec/conversions/vsext-run.c: New test.
	* gcc.target/riscv/rvv/autovec/conversions/vsext-rv32gcv.c: New test.
	* gcc.target/riscv/rvv/autovec/conversions/vsext-rv64gcv.c: New test.
	* gcc.target/riscv/rvv/autovec/conversions/vsext-template.h: New test.
	* gcc.target/riscv/rvv/autovec/conversions/vzext-run.c: New test.
	* gcc.target/riscv/rvv/autovec/conversions/vzext-rv32gcv.c: New test.
	* gcc.target/riscv/rvv/autovec/conversions/vzext-rv64gcv.c: New test.
	* gcc.target/riscv/rvv/autovec/conversions/vzext-template.h: New test.