RISC-V: Add rounding mode operand for fixed-point patterns

RISC-V: Add rounding mode operand for fixed-point patterns

Since we are going to have fixed-point intrinsics that are modeling
rounding mode
https://github.com/riscv-non-isa/rvv-intrinsic-doc/pull/222

We should have operand to specify rounding mode in fixed-point instructions.
We don't support these modeling rounding mode intrinsics yet but we will
definetely support them later.

This is the preparing patch for new coming intrinsics.

gcc/ChangeLog:

	* config/riscv/riscv-protos.h (enum vxrm_field_enum): New enum.
	* config/riscv/riscv-vector-builtins.cc
	(function_expander::use_exact_insn): Add default rounding mode operand.
	* config/riscv/riscv.cc (riscv_hard_regno_nregs): Add VXRM_REGNUM.
	(riscv_hard_regno_mode_ok): Ditto.
	(riscv_conditional_register_usage): Ditto.
	* config/riscv/riscv.h (DWARF_FRAME_REGNUM): Ditto.
	(VXRM_REG_P): Ditto.
	(RISCV_DWARF_VXRM): Ditto.
	* config/riscv/riscv.md: Ditto.
	* config/riscv/vector.md: Ditto

Signed-off-by: Juzhe-Zhong <juzhe.zhong@rivai.ai>