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RISC-V: Allow register pairs for 64-bit target.
authorJim Wilson <jimw@sifive.com>
Sat, 27 Jan 2018 00:00:11 +0000 (00:00 +0000)
committerJim Wilson <wilson@gcc.gnu.org>
Sat, 27 Jan 2018 00:00:11 +0000 (16:00 -0800)
commitd3f952c5e03e5eb0382e8b24fe8339728a66b922
tree6aacd69c700f38c060cba145fbc700ae7b2a8fe9tree | snapshot
parentcc24ff0dc2b163e10afaca62b25de74c5dc313fdcommit | diff
RISC-V: Allow register pairs for 64-bit target.

gcc/
* config/riscv/riscv.h (MAX_FIXED_MODE_SIZE): New.

From-SVN: r257114
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gcc/config/riscv/riscv.h diff | blob | blame | history
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