On RISC-V we are facing the fact, that our conditional branches
require Pmode conditions. Currently, we generate them explicitly
with a check for Pmode and then calling the proper generator
(i.e. gen_cbranchdi4 on RV64 and gen_cbranchsi4 on RV32).
Let's simplify this code by generating the INSN helpers
and use gen_cbranch4 (Pmode).
gcc/
PR target/100266
* config/riscv/riscv.c (riscv_block_move_loop): Use cbranch helper.
* config/riscv/riscv.md (cbranch<mode>4): Generate helpers.
(stack_protect_test): Use cbranch helper.