]> git.ipfire.org Git - thirdparty/gcc.git/commit
RISC-V: Add rounding mode enum for fixed-point intrinsics
authorJuzhe-Zhong <juzhe.zhong@rivai.ai>
Wed, 17 May 2023 01:51:43 +0000 (09:51 +0800)
committerPan Li <pan2.li@intel.com>
Wed, 17 May 2023 14:53:42 +0000 (22:53 +0800)
commit01d62e9b6c3e9fd3132f1616843103ccf81778ed
treee5348fb0955079f2ddd7c3a2d8397de575679d05
parentf513a10e4df44d7bcc8d1c2659ec8660ac938f9e
RISC-V: Add rounding mode enum for fixed-point intrinsics

Hi, since fixed-point with modeling rounding mode intrinsics are coming:
https://github.com/riscv-non-isa/rvv-intrinsic-doc/pull/222

I am adding vxrm rounding mode enum to user first before the API intrinsic.

This patch is simple && obvious.

Ok for trunk ?

gcc/ChangeLog:

* config/riscv/riscv-vector-builtins.cc (register_vxrm): New function.
(DEF_RVV_VXRM_ENUM): New macro.
(handle_pragma_vector): Add vxrm enum register.
* config/riscv/riscv-vector-builtins.def (DEF_RVV_VXRM_ENUM): New macro.
(RNU): Ditto.
(RNE): Ditto.
(RDN): Ditto.
(ROD): Ditto.

gcc/testsuite/ChangeLog:

* gcc.target/riscv/rvv/base/vxrm-1.c: New test.
gcc/config/riscv/riscv-vector-builtins.cc
gcc/config/riscv/riscv-vector-builtins.def
gcc/testsuite/gcc.target/riscv/rvv/base/vxrm-1.c [new file with mode: 0644]