]> git.ipfire.org Git - thirdparty/qemu.git/commit
hw/char/cmsdk-apb-uart.c: Correctly clear INTSTATUS bits on writes
authorPeter Maydell <peter.maydell@linaro.org>
Tue, 10 Apr 2018 13:42:03 +0000 (14:42 +0100)
committerMichael Roth <mdroth@linux.vnet.ibm.com>
Thu, 21 Jun 2018 01:45:02 +0000 (20:45 -0500)
commit0580c63b4fbf11d32a607efed8afaf7eee6a679e
treee097baaf89997d3ac822ac805cf3793a949b30cd
parentb17ed3e1d2746ae88863a074b4a1cb3a6b80fae8
hw/char/cmsdk-apb-uart.c: Correctly clear INTSTATUS bits on writes

The CMSDK APB UART INTSTATUS register bits are all write-one-to-clear.
We were getting this correct for the TXO and RXO bits (which need
special casing because their state lives in the STATE register),
but had forgotten to handle the normal bits for RX and TX which
we do store in our s->intstatus field.

Perform the W1C operation on the bits in s->intstatus too.

Fixes: https://bugs.launchpad.net/qemu/+bug/1760262
Cc: qemu-stable@nongnu.org
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20180410134203.17552-1-peter.maydell@linaro.org
(cherry picked from commit 6670b494fdb23f74ecd9be3d952c007f64e268f1)
Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>
hw/char/cmsdk-apb-uart.c