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AArch64: Improve codegen for SVE powf
authorYat Long Poon <yatlong.poon@arm.com>
Thu, 13 Feb 2025 18:03:04 +0000 (18:03 +0000)
committerWilco Dijkstra <wilco.dijkstra@arm.com>
Thu, 27 Feb 2025 17:08:58 +0000 (17:08 +0000)
commit06fd8ad78f35a6cc65dc7c6c08ce55faf6ad079d
tree2c23c5868397198ac69af1c9fdb8f4fdc34a543btree
parent7dc549c5a4af3c32689147550144397116404d22commit | diff
AArch64: Improve codegen for SVE powf

Improve memory access with indexed/unpredicated instructions.
Eliminate register spills.  Speedup on Neoverse V1: 3%.

Reviewed-by: Wilco Dijkstra <Wilco.Dijkstra@arm.com>
(cherry picked from commit 95e807209b680257a9afe81a507754f1565dbb4d)
sysdeps/aarch64/fpu/powf_sve.c diff | blob | blame | history
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