RISC-V: Robustify vec_init pattern[NFC]

RISC-V: Robustify vec_init pattern[NFC]

Although current GCC didn't cause ICE when I create FP16 vec_init case
with -march=rv64gcv (no ZVFH), current vec_init pattern looks wrong.

Since V_VLS FP16 predicate is TARGET_VECTOR_ELEN_FP_16, wheras vec_init
needs vfslide1down/vfslide1up.

It makes more sense to robustify the vec_init patterns which split them
into 2 patterns (one is integer, the other is float) like other autovectorization patterns.

gcc/ChangeLog:

	* config/riscv/autovec.md (vec_init<mode><vel>): Split patterns.