RISC-V: Ensure vector args and return use function stack to pass [PR110119]

RISC-V: Ensure vector args and return use function stack to pass [PR110119]

The V2 patch address comments from Juzhe, thanks.

Hi,

The reason for this bug is that in the case where the vector register is set
to a fixed length (with `--param=riscv-autovec-preference=fixed-vlmax` option),
TARGET_PASS_BY_REFERENCE thinks that variables of type vint32m1 can be passed
through two scalar registers, but when GCC calls FUNCTION_VALUE (call function
riscv_get_arg_info inside) it returns NULL_RTX. These two functions are not
unified. The current treatment is to pass all vector arguments and returns
through the function stack, and a new calling convention for vector registers
will be added in the future.

https://github.com/riscv-non-isa/riscv-elf-psabi-doc/
https://github.com/palmer-dabbelt/riscv-elf-psabi-doc/commit/126fa719972ff998a8a239c47d506c7809aea363

Best,
Lehua

gcc/ChangeLog:
	PR target/110119
	* config/riscv/riscv.cc (riscv_get_arg_info): Return NULL_RTX for vector mode
	(riscv_pass_by_reference): Return true for vector mode

gcc/testsuite/ChangeLog:
	PR target/110119
	* gcc.target/riscv/rvv/base/pr110119-1.c: New test.
	* gcc.target/riscv/rvv/base/pr110119-2.c: New test.