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arm64: dts: rockchip: Enable SPI1 on Ficus
authorManivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Fri, 17 May 2019 04:06:25 +0000 (09:36 +0530)
committerHeiko Stuebner <heiko@sntech.de>
Sun, 19 May 2019 23:00:32 +0000 (01:00 +0200)
commit0ee198ab08fe1b7cca93a81ad658954534963cb0
tree4d0c58b774e45a658f2defb6e2b50731538f18c8tree | snapshot
parent7b305b0fb05e0c91da4b1ef2fed12a8b5291c55bcommit | diff
arm64: dts: rockchip: Enable SPI1 on Ficus

Enable SPI1 exposed on both Low and High speed expansion connectors
of Ficus. SPI1 has 3 different chip selects wired as below:

CS0 - Serial Flash (unpopulated)
CS1 - Low Speed expansion
CS2 - High Speed expansion

Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
arch/arm64/boot/dts/rockchip/rk3399-ficus.dts diff | blob | blame | history
Mirror https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git