]> git.ipfire.org Git - thirdparty/qemu.git/commit
target/riscv: Include missing 'accel/tcg/getpc.h' in csr.c
authorPhilippe Mathieu-Daudé <philmd@linaro.org>
Thu, 24 Apr 2025 20:24:06 +0000 (22:24 +0200)
committerRichard Henderson <richard.henderson@linaro.org>
Wed, 30 Apr 2025 19:45:05 +0000 (12:45 -0700)
commit0f81774dd1c19de5dedb3c8f2d74e5b9a73d8c12
treec06b1e05129830505ffa818f422b4a1a56d9a930
parent3ea423c27f4eabee5068fce27412761fa3db8b0f
target/riscv: Include missing 'accel/tcg/getpc.h' in csr.c

"accel/tcg/getpc.h" is pulled in indirectly. Include it
explicitly to avoid when refactoring unrelated headers:

  target/riscv/csr.c:2117:25: error: call to undeclared function 'GETPC' [-Wimplicit-function-declaration]
   2117 |     if ((val & RVC) && (GETPC() & ~3) != 0) {
        |                         ^

Note the TODO comment around GETPC() added upon introduction in
commit f18637cd611 ("RISC-V: Add misa runtime write support"):

 2099 static RISCVException write_misa(CPURISCVState *env, int csrno,
 2100                                  target_ulong val)
 2101 {
  ...
 2113     /*
 2114      * Suppress 'C' if next instruction is not aligned
 2115      * TODO: this should check next_pc
 2116      */
 2117     if ((val & RVC) && (GETPC() & ~3) != 0) {
 2118         val &= ~RVC;
 2119     }

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Mark Cave-Ayland <mark.caveayland@nutanix.com>
Acked-by: Alistair Francis <alistair.francis@wdc.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-ID: <20250424202412.91612-8-philmd@linaro.org>
target/riscv/csr.c