]> git.ipfire.org Git - thirdparty/qemu.git/commit
tcg: TCGMemOp is now accelerator independent MemOp
authorTony Nguyen <tony.nguyen@bt.com>
Fri, 23 Aug 2019 18:10:58 +0000 (04:10 +1000)
committerRichard Henderson <richard.henderson@linaro.org>
Tue, 3 Sep 2019 15:30:38 +0000 (08:30 -0700)
commit14776ab5a12972ea439c7fb2203a4c15a09094b4
treeb53091625b410a722bf5f4e17a9631457994eed4
parentfec105c2abda8567ec15230429c41429b5ee307c
tcg: TCGMemOp is now accelerator independent MemOp

Preparation for collapsing the two byte swaps, adjust_endianness and
handle_bswap, along the I/O path.

Target dependant attributes are conditionalized upon NEED_CPU_H.

Signed-off-by: Tony Nguyen <tony.nguyen@bt.com>
Acked-by: David Gibson <david@gibson.dropbear.id.au>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Acked-by: Cornelia Huck <cohuck@redhat.com>
Message-Id: <81d9cd7d7f5aaadfa772d6c48ecee834e9cf7882.1566466906.git.tony.nguyen@bt.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
39 files changed:
MAINTAINERS
accel/tcg/cputlb.c
include/exec/memop.h [new file with mode: 0644]
target/alpha/translate.c
target/arm/translate-a64.c
target/arm/translate-a64.h
target/arm/translate-sve.c
target/arm/translate.c
target/arm/translate.h
target/hppa/translate.c
target/i386/translate.c
target/m68k/translate.c
target/microblaze/translate.c
target/mips/translate.c
target/openrisc/translate.c
target/ppc/translate.c
target/riscv/insn_trans/trans_rva.inc.c
target/riscv/insn_trans/trans_rvi.inc.c
target/s390x/translate.c
target/s390x/translate_vx.inc.c
target/sparc/translate.c
target/tilegx/translate.c
target/tricore/translate.c
tcg/README
tcg/aarch64/tcg-target.inc.c
tcg/arm/tcg-target.inc.c
tcg/i386/tcg-target.inc.c
tcg/mips/tcg-target.inc.c
tcg/optimize.c
tcg/ppc/tcg-target.inc.c
tcg/riscv/tcg-target.inc.c
tcg/s390/tcg-target.inc.c
tcg/sparc/tcg-target.inc.c
tcg/tcg-op.c
tcg/tcg-op.h
tcg/tcg.c
tcg/tcg.h
trace/mem-internal.h
trace/mem.h