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RISC-V: Fix scan-assembler-times of RVV test case
authorxuli <xuli1@eswincomputing.com>
Sat, 7 Oct 2023 03:12:51 +0000 (03:12 +0000)
committerxuli <xuli1@eswincomputing.com>
Sat, 7 Oct 2023 03:49:40 +0000 (03:49 +0000)
commit15c1530ebbbcff5ddd254988904c5d5ce72c58f4
tree84aa1baa164d111f3e4e6f38ca0b291f29719e3ftree
parent0defa2a0f8c4d6370588befbb3e61f25ffbd727ccommit | diff
RISC-V: Fix scan-assembler-times of RVV test case

gcc/testsuite/ChangeLog:

* gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-25.c: Adjust assembler times.
* gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-26.c: Ditto.
gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-25.c diff | blob | blame | history
gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-26.c diff | blob | blame | history
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