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(parent: 46d7642) | patch
target/mips: Add fields for SAARI and SAAR CP0 registers
authorYongbok Kim <yongbok.kim@mips.com>
Thu, 3 Jan 2019 13:12:48 +0000 (14:12 +0100)
committerAleksandar Markovic <amarkovic@wavecomp.com>
Fri, 18 Jan 2019 15:53:28 +0000 (16:53 +0100)
commit167db30e981cd72bef15182178037e51afc8e40d
treee96593cc3bd2de7a49ab5dba52cbd9e057aa3fd5tree | snapshot
parent46d7642fcc97ac108c8080fbe41bc5d00bb537f2commit | diff
target/mips: Add fields for SAARI and SAAR CP0 registers

Add fields for SAARI and SAAR CP0 registers.

Reviewed-by: Stefan Markovic <smarkovic@wavecomp.com>
Signed-off-by: Yongbok Kim <yongbok.kim@mips.com>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
target/mips/cpu.h diff | blob | blame | history
target/mips/machine.c diff | blob | blame | history
Mirror of https://git.qemu.org/git/qemu.git