]> git.ipfire.org Git - thirdparty/qemu.git/commit
hw/arm/xlnx-versal: add the target field in IRQ descriptor
authorLuc Michel <luc.michel@amd.com>
Fri, 26 Sep 2025 07:07:56 +0000 (09:07 +0200)
committerPeter Maydell <peter.maydell@linaro.org>
Tue, 7 Oct 2025 09:35:36 +0000 (10:35 +0100)
commit16aa53c971c4a2fef5608f8aac372dd03305f0d2
treea5aea563a48618331380dd1cad2325acaeb1f6a9
parent268f7a3d24a73b94bfab1dd86c6b41f7afd196fc
hw/arm/xlnx-versal: add the target field in IRQ descriptor

Add the target field in the IRQ descriptor. This allows to target an IRQ
to another IRQ controller than the GIC(s). Other supported targets are
the PMC PPU1 CPU interrupt controller and the EAM (Error management)
device. Those two devices are currently not implemented so IRQs
targeting those will be left unconnected. This is in preparation for
versal2.

Signed-off-by: Luc Michel <luc.michel@amd.com>
Reviewed-by: Francisco Iglesias <francisco.iglesias@amd.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@amd.com>
Tested-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-id: 20250926070806.292065-39-luc.michel@amd.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
hw/arm/xlnx-versal.c