]> git.ipfire.org Git - thirdparty/gcc.git/commit
i386: Fix AVX512 intrin macro typo
authorHaochen Jiang <haochen.jiang@intel.com>
Thu, 25 Jul 2024 08:12:20 +0000 (16:12 +0800)
committerHaochen Jiang <haochen.jiang@intel.com>
Mon, 29 Jul 2024 02:10:31 +0000 (10:10 +0800)
commit16daeb262af4566e665a941368cb15bc2cba3f07
tree9623c1c8d9d5b06496e6a6288537d3aa993a120d
parentb6bf054de77ae3e3816d3d1b2eb9bf9bc3285187
i386: Fix AVX512 intrin macro typo

There are several typo in AVX512 intrins macro define. Correct them to solve
errors when compiled with -O0.

gcc/ChangeLog:

* config/i386/avx512dqintrin.h
(_mm_mask_fpclass_ss_mask): Correct operand order.
(_mm_mask_fpclass_sd_mask): Ditto.
(_mm256_maskz_reduce_round_ss): Use __builtin_ia32_reducess_mask_round
instead of __builtin_ia32_reducesd_mask_round.
(_mm_reduce_round_sd): Use -1 as mask since it is non-mask.
(_mm_reduce_round_ss): Ditto.
* config/i386/avx512vlbwintrin.h
(_mm256_mask_alignr_epi8): Correct operand usage.
(_mm_mask_alignr_epi8): Ditto.
* config/i386/avx512vlintrin.h (_mm_mask_alignr_epi64): Ditto.

gcc/testsuite/ChangeLog:

* gcc.target/i386/avx512bw-vpalignr-1b.c: New test.
* gcc.target/i386/avx512dq-vfpclasssd-1b.c: Ditto.
* gcc.target/i386/avx512dq-vfpclassss-1b.c: Ditto.
* gcc.target/i386/avx512dq-vreducesd-1b.c: Ditto.
* gcc.target/i386/avx512dq-vreducess-1b.c: Ditto.
* gcc.target/i386/avx512vl-valignq-1b.c: Ditto.
gcc/config/i386/avx512dqintrin.h
gcc/config/i386/avx512vlbwintrin.h
gcc/config/i386/avx512vlintrin.h
gcc/testsuite/gcc.target/i386/avx512bw-vpalignr-1b.c [new file with mode: 0644]
gcc/testsuite/gcc.target/i386/avx512dq-vfpclasssd-1b.c [new file with mode: 0644]
gcc/testsuite/gcc.target/i386/avx512dq-vfpclassss-1b.c [new file with mode: 0644]
gcc/testsuite/gcc.target/i386/avx512dq-vreducesd-1b.c [new file with mode: 0644]
gcc/testsuite/gcc.target/i386/avx512dq-vreducess-1b.c [new file with mode: 0644]
gcc/testsuite/gcc.target/i386/avx512vl-valignq-1b.c [new file with mode: 0644]