RISC-V: Add testcases for unsigned .SAT_SUB form 2 with IMM = 1.

RISC-V: Add testcases for unsigned .SAT_SUB form 2 with IMM = 1.

form2:
T __attribute__((noinline))             \
sat_u_sub_imm##IMM##_##T##_fmt_2 (T x)  \
{                                       \
  return x >= (T)IMM ? x - (T)IMM : 0;  \
}

Passed the rv64gcv regression test.

Signed-off-by: Li Xu <xuli1@eswincomputing.com>
gcc/testsuite/ChangeLog:

	* gcc.target/riscv/sat_u_sub_imm-run-5.c: add run case for imm=1.
	* gcc.target/riscv/sat_u_sub_imm-run-6.c: Ditto.
	* gcc.target/riscv/sat_u_sub_imm-run-7.c: Ditto.
	* gcc.target/riscv/sat_u_sub_imm-run-8.c: Ditto.
	* gcc.target/riscv/sat_u_sub_imm-5_3.c: New test.
	* gcc.target/riscv/sat_u_sub_imm-6_3.c: New test.
	* gcc.target/riscv/sat_u_sub_imm-7_3.c: New test.
	* gcc.target/riscv/sat_u_sub_imm-8_1.c: New test.