LoongArch: Fix insn output of vec_concat templates for LASX.

LoongArch: Fix insn output of vec_concat templates for LASX.

When investigaing failure of gcc.dg/vect/slp-reduc-sad.c, following
instruction block are being generated by vec_concatv32qi (which is
generated by vec_initv32qiv16qi) at entrance of foo() function:

  vldx    $vr3,$r5,$r6
  vld     $vr2,$r5,0
  xvpermi.q       $xr2,$xr3,0x20

causes the reversion of vec_initv32qiv16qi operation's high and
low 128-bit part.

According to other target's similar impl and LSX impl for following
RTL representation, current definition in lasx.md of "vec_concat<mode>"
are wrong:

  (set (op0) (vec_concat (op1) (op2)))

For correct behavior, the last argument of xvpermi.q should be 0x02
instead of 0x20. This patch fixes this issue and cleanup the vec_concat
template impl.

gcc/ChangeLog:

	* config/loongarch/lasx.md (vec_concatv4di): Delete.
	(vec_concatv8si): Delete.
	(vec_concatv16hi): Delete.
	(vec_concatv32qi): Delete.
	(vec_concatv4df): Delete.
	(vec_concatv8sf): Delete.
	(vec_concat<mode>): New template with insn output fixed.