]> git.ipfire.org Git - thirdparty/gcc.git/commit
aarch64: Fix fp8_scalar_1.c's stacktest1
authorAndrew Pinski <quic_apinski@quicinc.com>
Tue, 26 Nov 2024 21:05:00 +0000 (13:05 -0800)
committerAndrew Pinski <quic_apinski@quicinc.com>
Tue, 26 Nov 2024 21:11:59 +0000 (13:11 -0800)
commit1a0d48060d6b0b7783adabb321f0a96ead16080b
tree6392c12cc71b79ad22e1b13e85f4b4e6bb825716
parent746629e22888b376f95c45779db40bfbfe2ab282
aarch64: Fix fp8_scalar_1.c's stacktest1

The function body test was expecting:
umov w0, v0.b[0]
strb w0, [sp, 15]

But the code generation was improved after r15-5375-gbeec291225be to just:
str b0, [sp, 15]

which is correct and better because no longer need to move between SIMD registers
and the GPRs.
This changes the function body test to new better code generation.

Pushed as obvious after a test of the testcase to make sure it now passes.

gcc/testsuite/ChangeLog:

* gcc.target/aarch64/fp8_scalar_1.c (stacktest1): Fix for new
improved code generation.

Signed-off-by: Andrew Pinski <quic_apinski@quicinc.com>
gcc/testsuite/gcc.target/aarch64/fp8_scalar_1.c