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RISC-V: Fix VSETVL PASS AVL/VL fetch bug[111295]
authorJuzhe-Zhong <juzhe.zhong@rivai.ai>
Wed, 6 Sep 2023 12:47:24 +0000 (20:47 +0800)
committerPan Li <pan2.li@intel.com>
Wed, 6 Sep 2023 13:58:53 +0000 (21:58 +0800)
commit1b4c70d4271a00514ae20970d483c3b78d9d66ef
tree5fefca46978b49bbf7b4a9d9af7e5ef38be0e141tree | snapshot
parentee21f79f72980732214156bae2eb5daf7e089bdacommit | diff
RISC-V: Fix VSETVL PASS AVL/VL fetch bug[111295]

Fix bugzilla: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111295

gcc/ChangeLog:

PR target/111295
* config/riscv/riscv-vsetvl.cc (insert_vsetvl): Bug fix.

gcc/testsuite/ChangeLog:

PR target/111295
* gcc.target/riscv/rvv/autovec/pr111295.c: New test.
gcc/config/riscv/riscv-vsetvl.cc diff | blob | blame | history
gcc/testsuite/gcc.target/riscv/rvv/autovec/pr111295.c [new file with mode: 0644] blob
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