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target/xtensa: add sample_controller core
authorMax Filippov <jcmvbkbc@gmail.com>
Thu, 11 Jan 2018 19:13:01 +0000 (11:13 -0800)
committerMax Filippov <jcmvbkbc@gmail.com>
Mon, 22 Jan 2018 19:54:58 +0000 (11:54 -0800)
commit251634f4ce589d17eb0a14e36c65090713eb9e56
tree48af8f7673af5a0aa9b59feb80aff7bcb9de50c7tree
parenta3c5e49da98156a3895cddb4a9f54d8bec4e889bcommit | diff
target/xtensa: add sample_controller core

The sample_controller core is a simple noMMU general purpose core, modern
analog of de212. It is used as a default core in the xtensa port of
Zephyr.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
target/xtensa/Makefile.objs diff | blob | blame | history
target/xtensa/core-sample_controller.c [new file with mode: 0644] blob
target/xtensa/core-sample_controller/core-isa.h [new file with mode: 0644] blob
target/xtensa/core-sample_controller/gdb-config.c [new file with mode: 0644] blob
target/xtensa/core-sample_controller/xtensa-modules.c [new file with mode: 0644] blob
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