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target/ppc: IBM PPE42 exception flags and regs
authorGlenn Miles <milesg@linux.ibm.com>
Thu, 25 Sep 2025 20:17:41 +0000 (15:17 -0500)
committerHarsh Prateek Bora <harshpb@linux.ibm.com>
Sun, 28 Sep 2025 17:56:51 +0000 (23:26 +0530)
commit27eee49e6e3cecf69ab02f84fc2d9e19ef8bd3e2
tree36141301a24c048b74c126363e4890a9d56bee4btree | snapshot
parent0af45e550b50f1c41164e5c0440654319942707ecommit | diff
target/ppc: IBM PPE42 exception flags and regs

Introduces flags and register definitions needed
for the IBM PPE42 exception model.

Signed-off-by: Glenn Miles <milesg@linux.ibm.com>
Reviewed-by: Chinmay Rath <rathc@linux.ibm.com>
Signed-off-by: Harsh Prateek Bora <harshpb@linux.ibm.com>
Link: https://lore.kernel.org/r/20250925201758.652077-4-milesg@linux.ibm.com
Message-ID: <20250925201758.652077-4-milesg@linux.ibm.com>
target/ppc/cpu.h diff | blob | blame | history
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