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author	Vivien Didelot <vivien.didelot@savoirfairelinux.com>
	Mon, 12 Jun 2017 16:37:42 +0000 (12:37 -0400)
committer	David S. Miller <davem@davemloft.net>
	Tue, 13 Jun 2017 15:23:11 +0000 (11:23 -0400)
commit	2cb8cb144eef6b3175e95504eae7f385bdb35c69
tree	75ada6aa8a7ac4406fd7ba0205b98c76f402c996	tree \| snapshot
parent	81c6edb23b61a4dec5e0a8954f69a151baeb55f4	commit \| diff

net: dsa: mv88e6xxx: prefix Port Egress Rate Control macros

For implicit namespacing and clarity, prefix the common Port Egress Rate
Control and Port Egress Rate Control 2 registers macros with
MV88E6XXX_PORT_EGRESS_RATE_CTL1 and MV88E6XXX_PORT_EGRESS_RATE_CTL2.

Document the register and prefer ordered hex masks values for all
Marvell 16-bit registers.

Signed-off-by: Vivien Didelot <vivien.didelot@savoirfairelinux.com>
Signed-off-by: David S. Miller <davem@davemloft.net>

drivers/net/dsa/mv88e6xxx/chip.c		diff \| blob \| blame \| history
drivers/net/dsa/mv88e6xxx/port.c		diff \| blob \| blame \| history
drivers/net/dsa/mv88e6xxx/port.h		diff \| blob \| blame \| history

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