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target/loongarch: Add missing TLB flush with different asid
authorBibo Mao <maobibo@loongson.cn>
Thu, 9 Oct 2025 02:59:31 +0000 (10:59 +0800)
committerBibo Mao <maobibo@loongson.cn>
Wed, 15 Oct 2025 02:57:49 +0000 (10:57 +0800)
commit2e9ff01a912997c4af066aab5e43a52db6c68aaf
tree32cdec7c2d9d9e01ca896ccf15f6dbed7f5c82edtree | snapshot
parent3bf5c57a11827d9fa706524d57ee3e5af68a429ecommit | diff
target/loongarch: Add missing TLB flush with different asid

If asid is changed in function helper_csrwr_asid(), qemu TLB is flushed,
however loongArch TLB is still valid. So loongArch TLB need be invalidated
in function invalidate_tlb() with different asid and bit effective need
be cleared.

Signed-off-by: Bibo Mao <maobibo@loongson.cn>
Reviewed-by: Song Gao <gaosong@loongson.cn>
target/loongarch/tcg/tlb_helper.c diff | blob | blame | history
Mirror of https://git.qemu.org/git/qemu.git