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xtensa: Fix conflicting hard regno between indirect sibcall fixups and EH_RETURN_STAC...
authorTakayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
Fri, 29 Jul 2022 19:32:46 +0000 (04:32 +0900)
committerMax Filippov <jcmvbkbc@gmail.com>
Sat, 30 Jul 2022 04:14:18 +0000 (21:14 -0700)
commit2fa8c4a659a19ec971c80704f48f96c13aae9ac3
tree32c4de5bf7a2a033f0380b44c49baebb3fb94617tree | snapshot
parent48e9954d0865b5e5e31cb77ad05c45f7206eeb9fcommit | diff
xtensa: Fix conflicting hard regno between indirect sibcall fixups and EH_RETURN_STACKADJ_RTX

The hard register A10 was already allocated for EH_RETURN_STACKADJ_RTX.
(although exception handling and sibling call may not apply at the same time,
 but for safety)

gcc/ChangeLog:

* config/xtensa/xtensa.md: Change hard register number used in
the split patterns for indirect sibling call fixups from 10 to 11,
the last free one for the CALL0 ABI.
gcc/config/xtensa/xtensa.md diff | blob | blame | history
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