]> git.ipfire.org Git - people/ms/gcc.git/commit
dwarf: Multi-register CFI address support
authorAndrew Stubbs <ams@codesourcery.com>
Mon, 27 Jul 2020 09:55:22 +0000 (10:55 +0100)
committerKwok Cheung Yeung <kcy@codesourcery.com>
Tue, 21 Jun 2022 13:11:29 +0000 (14:11 +0100)
commit3405728e403ce7054f09e9a69846a57f680060db
treed8467c9d61b41034d64a8bf40e039311a2ed1200
parentcb27503484753e88fed62ad7b172cf8a398ccc54
dwarf: Multi-register CFI address support

Add support for architectures such as AMD GCN, in which the pointer size is
larger than the register size.  This allows the CFI information to include
multi-register locations for the stack pointer, frame pointer, and return
address.

Note that this uses a newly proposed DWARF operator DW_OP_LLVM_piece_end,
which is currently only recognized by the ROCGDB debugger from AMD.  The exact
name and encoding for this operator is subject to change if and when the DWARF
standard accepts it.

gcc/ChangeLog:

* dwarf2cfi.cc (get_cfa_from_loc_descr): Support register spans
with DW_OP_piece and DW_OP_LLVM_piece_end.
* dwarf2out.cc (build_cfa_loc): Support register spans.

include/ChangeLog:

* dwarf2.def (DW_OP_LLVM_piece_end): New extension operator.
gcc/ChangeLog.omp
gcc/dwarf2cfi.cc
gcc/dwarf2out.cc
include/ChangeLog.omp
include/dwarf2.def