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(parent: 33c3dfd) | patch
armv8: ls1046ardb: update the DIMM WRLVL_START value
authorYuantian Tang <andy.tang@nxp.com>
Mon, 20 Apr 2020 04:52:54 +0000 (12:52 +0800)
committerPriyanka Jain <priyanka.jain@nxp.com>
Tue, 28 Apr 2020 12:16:46 +0000 (17:46 +0530)
commit35ad8f7af4ec7a2e449322c86c5301c48765a269
tree44867ef553c6001161d8cf55187bf8b0f306c256tree | snapshot
parent33c3dfd2976e0752e69c36b27b88809c9b4ada12commit | diff
armv8: ls1046ardb: update the DIMM WRLVL_START value

The WRLVL_START values are optimized for old DDR MTA18ASF1G72AZ.
Update DDR struct to set new WRLVL_START values so that the new DIMM
MTA18ADF2G72AZ get optimized and the old DIMM still works.

Signed-off-by: Yuantian Tang <andy.tang@nxp.com>
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
board/freescale/ls1046ardb/ddr.h diff | blob | blame | history
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