RISC-V: Finish Typing Un-Typed Instructions and Turn on Assert

RISC-V: Finish Typing Un-Typed Instructions and Turn on Assert

Updates autovec instruction that was added after last patch and turns on the
assert statement to ensure all new instructions have a type.

	* config/riscv/autovec-opt.md: Update type
	* config/riscv/riscv.cc (riscv_sched_variable_issue): Enable assert

Reviewed-by: Jeff Law <jlaw@ventanamicro.com>
Signed-off-by: Edwin Lu <ewlu@rivosinc.com>