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(parent: 10a5233) | patch
re PR target/17245 (ICE compiling gsl-1.5 statistics/lag1.c)
authorEric Botcazou <ebotcazou@gcc.gnu.org>
Fri, 8 Oct 2004 13:34:56 +0000 (13:34 +0000)
committerEric Botcazou <ebotcazou@gcc.gnu.org>
Fri, 8 Oct 2004 13:34:56 +0000 (13:34 +0000)
commit39ba2f92e1b7970615fd87e16bff32b100c07252
treeb237fbaf12e296948730cf86c8b2c35e5e75c855tree
parent10a5233517ed126df715d041cdb64e41bb365cb2commit | diff
re PR target/17245 (ICE compiling gsl-1.5 statistics/lag1.c)

PR target/17245
* config/sparc/sparc.c (input_operand): Remove redundant code
for handling LO_SUM.
(legitimate_address_p) <REG+REG>: Do not recheck TARGET_V9.
<LO_SUM>: If LO_SUM is offsettable, accept it for TFmode on V9.
Otherwise only accept it for TFmode if quad move insns are available.

From-SVN: r88753
gcc/ChangeLog diff | blob | blame | history
gcc/config/sparc/sparc.c diff | blob | blame | history
gcc/testsuite/ChangeLog diff | blob | blame | history
gcc/testsuite/gcc.dg/ultrasp11.c [new file with mode: 0644] blob
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