]> git.ipfire.org Git - thirdparty/qemu.git/commit
target/arm: HCR_EL2.RW should be RAO/WI if EL1 doesn't support AArch32
authorPeter Maydell <peter.maydell@linaro.org>
Wed, 12 Mar 2025 13:25:07 +0000 (13:25 +0000)
committerPeter Maydell <peter.maydell@linaro.org>
Fri, 14 Mar 2025 12:54:33 +0000 (12:54 +0000)
commit39ec3fc030166c594a64d1d197e29fa9d100d4c5
tree3236b1e99eb55326481b765a16b5417fc188fe2e
parent5d71c6820f3b91763b5807311969cc0362d457d9
target/arm: HCR_EL2.RW should be RAO/WI if EL1 doesn't support AArch32

When EL1 doesn't support AArch32, the HCR_EL2.RW bit is supposed to
be RAO/WI. Enforce the RAO/WI behaviour.

Note that we handle "reset value should honour RES1 bits" in the same
way that SCR_EL3 does, via a reset function.

We do already have some CPU types which don't implement AArch32
above EL0, so this is technically a bug; it doesn't seem worth
backporting to stable because no sensible guest code will be
deliberately attempting to set the RW bit to a value corresponding
to an unimplemented execution state and then checking that we
did the right thing.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
target/arm/helper.c