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(parent: fe5f652) | patch
RISC-V: Add missing mode_idx for vrol and vror
authorKito Cheng <kito.cheng@sifive.com>
Tue, 27 Aug 2024 13:27:02 +0000 (21:27 +0800)
committerKito Cheng <kito.cheng@sifive.com>
Wed, 28 Aug 2024 01:13:18 +0000 (09:13 +0800)
commit3cde331e9590944819621bcde41ddbffd9bbf0ba
tree3b78a42dfd6d6c27e905c6bcaf9781d1c55c80f6tree
parentfe5f652bab420eb372645281f7fe3e5aa1534d01commit | diff
RISC-V: Add missing mode_idx for vrol and vror

We add pattern for vector rotate, but seems like we forgot adding
mode_idx which used in AVL propgation (riscv-avlprop.cc).

gcc/ChangeLog:

* config/riscv/vector.md (mode_idx): Add vrol and vror.

gcc/testsuite/ChangeLog:

* gcc.target/riscv/rvv/autovec/rotr.c: New.
gcc/config/riscv/vector.md diff | blob | blame | history
gcc/testsuite/gcc.target/riscv/rvv/autovec/rotr.c [new file with mode: 0644] blob
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