]> git.ipfire.org Git - thirdparty/qemu.git/commit
target/arm: Pass correct esize to sve_st1_z() for LD1Q, ST1Q
authorPeter Maydell <peter.maydell@linaro.org>
Wed, 23 Jul 2025 16:54:57 +0000 (17:54 +0100)
committerPeter Maydell <peter.maydell@linaro.org>
Fri, 25 Jul 2025 09:31:45 +0000 (10:31 +0100)
commit4726be1c69606e34c3cc4c26e39e252a9856b3d3
tree83c2c8f7accc99715d5cc48d3b10892affe9c035
parent1c6aae5efbd28ac35003dea341364cd63a4515a1
target/arm: Pass correct esize to sve_st1_z() for LD1Q, ST1Q

Our implementation of the helper functions for the LD1Q and ST1Q
insns reused the existing DO_LD1_ZPZ_D and DO_ST1_ZPZ_D macros.  This
passes the wrong esize (8, not 16) to sve_ldl_z().

Create new macros DO_LD1_ZPZ_Q and DO_ST1_ZPZ_Q which pass the
correct esize, and use them for the LD1Q and ST1Q helpers.

Fixes: d2aa9a804ee ("target/arm: Implement LD1Q, ST1Q for SVE2p1")
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20250723165458.3509150-6-peter.maydell@linaro.org
target/arm/tcg/sve_helper.c