]> git.ipfire.org Git - thirdparty/gcc.git/commit
RISC-V: Refine strided load/store testcase dump check to tree optimized
authorPan Li <pan2.li@intel.com>
Fri, 20 Dec 2024 01:11:20 +0000 (09:11 +0800)
committerPan Li <pan2.li@intel.com>
Fri, 20 Dec 2024 10:29:10 +0000 (18:29 +0800)
commit4779dd022927c41d2c261cdf5289e8bdecd0697d
treeb16c1b1d1c3f2c6ba51f50fc243fb751e39504fb
parenteee2891312a9b42acabcc82739604c9fa8421757
RISC-V: Refine strided load/store testcase dump check to tree optimized

Like the sat alu related testcase, the dump check of strided load/store
takes the rtl dump for the standard name MASK_LEN_STRIDED_LOAD for times.
But the rtl pass expand is somehow mutable by the middle-end change or
debug information.

After that we need to adjust the dump check time and again.  This
patch would like to switch to tree optimized pass for the standard
name check, which is more stable up to a point.

The below test suites are passed for this patch.
* The rv64gcv fully regression test.

It is test only patch and obvious up to a point, will commit it
directly if no comments in next 48H.

gcc/testsuite/ChangeLog:

* gcc.target/riscv/rvv/autovec/strided/strided_ld_st-1-f16.c: Take
tree-optimized pass for standard name check, and adjust the times.
* gcc.target/riscv/rvv/autovec/strided/strided_ld_st-1-f32.c: Ditto
* gcc.target/riscv/rvv/autovec/strided/strided_ld_st-1-f64.c: Ditto
* gcc.target/riscv/rvv/autovec/strided/strided_ld_st-1-i16.c: Ditto
* gcc.target/riscv/rvv/autovec/strided/strided_ld_st-1-i32.c: Ditto
* gcc.target/riscv/rvv/autovec/strided/strided_ld_st-1-i64.c: Ditto
* gcc.target/riscv/rvv/autovec/strided/strided_ld_st-1-i8.c: Ditto
* gcc.target/riscv/rvv/autovec/strided/strided_ld_st-1-u16.c: Ditto
* gcc.target/riscv/rvv/autovec/strided/strided_ld_st-1-u32.c: Ditto
* gcc.target/riscv/rvv/autovec/strided/strided_ld_st-1-u64.c: Ditto
* gcc.target/riscv/rvv/autovec/strided/strided_ld_st-1-u8.c: Ditto

Signed-off-by: Pan Li <pan2.li@intel.com>
gcc/testsuite/gcc.target/riscv/rvv/autovec/strided/strided_ld_st-1-f16.c
gcc/testsuite/gcc.target/riscv/rvv/autovec/strided/strided_ld_st-1-f32.c
gcc/testsuite/gcc.target/riscv/rvv/autovec/strided/strided_ld_st-1-f64.c
gcc/testsuite/gcc.target/riscv/rvv/autovec/strided/strided_ld_st-1-i16.c
gcc/testsuite/gcc.target/riscv/rvv/autovec/strided/strided_ld_st-1-i32.c
gcc/testsuite/gcc.target/riscv/rvv/autovec/strided/strided_ld_st-1-i64.c
gcc/testsuite/gcc.target/riscv/rvv/autovec/strided/strided_ld_st-1-i8.c
gcc/testsuite/gcc.target/riscv/rvv/autovec/strided/strided_ld_st-1-u16.c
gcc/testsuite/gcc.target/riscv/rvv/autovec/strided/strided_ld_st-1-u32.c
gcc/testsuite/gcc.target/riscv/rvv/autovec/strided/strided_ld_st-1-u64.c
gcc/testsuite/gcc.target/riscv/rvv/autovec/strided/strided_ld_st-1-u8.c