]> git.ipfire.org Git - thirdparty/qemu.git/commit
tcg/ppc: Update vector support for VSX
authorRichard Henderson <richard.henderson@linaro.org>
Sun, 23 Jun 2019 17:04:47 +0000 (19:04 +0200)
committerRichard Henderson <richard.henderson@linaro.org>
Mon, 14 Oct 2019 14:10:20 +0000 (07:10 -0700)
commit47c906ae6f54fa10b3f072863d8993e790a14439
treeb76a7f6b9782e7403e4e85fa29999bfef487eefb
parent68f340d4cd9f0423039e4706a6602673d7ca9101
tcg/ppc: Update vector support for VSX

The VSX instruction set instructions include double-word loads and
stores, double-word load and splat, double-word permute, and bit
select.  All of which require multiple operations in the Altivec
instruction set.

Because the VSX registers map %vsr32 to %vr0, and we have no current
intention or need to use vector registers outside %vr0-%vr19, force
on the {ax,bx,cx,tx} bits within the added VSX insns so that we don't
have to otherwise modify the VR[TABC] macros.

Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
tcg/ppc/tcg-target.h
tcg/ppc/tcg-target.inc.c