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[ARM] Enable arm target in ira-shrinkwrap-prep* testcases.
authorJiong Wang <jiong.wang@arm.com>
Wed, 23 Jul 2014 09:24:58 +0000 (09:24 +0000)
committerKyrylo Tkachov <ktkachov@gcc.gnu.org>
Wed, 23 Jul 2014 09:24:58 +0000 (09:24 +0000)
commit47e1e86f7b7f7b0cdfa7d9bbc54e3c317d70733a
tree740fcdba03dd0baf18da8718fdeabcbd8a4ab363tree | snapshot
parente9a8fc239e24b5afc496a5f8595c3dc2c476b1c2commit | diff
[ARM] Enable arm target in ira-shrinkwrap-prep* testcases.

[gcc/]

* config/arm/arm.c (arm_get_frame_offsets): If both r3 and other
callee-saved registers are available for padding purpose
and r3 is not mandatory, then prefer use those callee-saved
instead of r3.

[gcc/testsuite]

* gcc.dg/ira-shrinkwrap-prep-1.c (target): Add arm_nothumb.
* gcc.dg/ira-shrinkwrap-prep-2.c (target): Likewise.
* gcc.dg/pr10474.c (target): Likewise.

From-SVN: r212927
gcc/ChangeLog diff | blob | blame | history
gcc/config/arm/arm.c diff | blob | blame | history
gcc/testsuite/ChangeLog diff | blob | blame | history
gcc/testsuite/gcc.dg/ira-shrinkwrap-prep-1.c diff | blob | blame | history
gcc/testsuite/gcc.dg/ira-shrinkwrap-prep-2.c diff | blob | blame | history
gcc/testsuite/gcc.dg/pr10474.c diff | blob | blame | history
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