]> git.ipfire.org Git - thirdparty/gcc.git/commit
LoongArch: Fix incorrect reorder of __lsx_vldx and __lasx_xvldx [PR119084]
authorXi Ruoyao <xry111@xry111.site>
Sun, 2 Mar 2025 11:02:50 +0000 (19:02 +0800)
committerXi Ruoyao <xry111@xry111.site>
Wed, 5 Mar 2025 02:53:58 +0000 (10:53 +0800)
commit4856292f7a680ec478e7607f1b71781996d7d542
tree69d33aca8e6231ce4ecc899ff49f42e530546428
parentc49ef76dc78e4fd185f046d038c9692781d3b3e4
LoongArch: Fix incorrect reorder of __lsx_vldx and __lasx_xvldx [PR119084]

They could be incorrectly reordered with store instructions like st.b
because the RTL expression does not have a memory_operand or a (mem)
expression.  The incorrect reorder has been observed in openh264 LTO
build.

Expand them to a (mem) expression instead of unspec to fix the issue.
Then we need to make loongarch_address_insns return 1 for
ADDRESS_REG_REG because the constraint "R" expects this behavior, or
the vldx instruction will be considered invalid by the register
allocate pass and turned to add.d + vld.  Apply the ADDRESS_REG_REG
penalty in loongarch_address_cost instead, loongarch_rtx_costs should
also call loongarch_address_cost instead of loongarch_address_insns
then.

Closes: https://github.com/cisco/openh264/issues/3857
gcc/ChangeLog:

PR target/119084
* config/loongarch/lasx.md (UNSPEC_LASX_XVLDX): Remove.
(lasx_xvldx): Remove.
* config/loongarch/lsx.md (UNSPEC_LSX_VLDX): Remove.
(lsx_vldx): Remove.
* config/loongarch/simd.md (QIVEC): New define_mode_iterator.
(<simd_isa>_<x>vldx): New define_expand.
* config/loongarch/loongarch.cc (loongarch_address_insns_1): New
static function with most logic factored out from ...
(loongarch_address_insns): ... here.  Call
loongarch_address_insns_1 with reg_reg_cost = 1.
(loongarch_address_cost): Call loongarch_address_insns_1 with
reg_reg_cost = la_addr_reg_reg_cost.

gcc/testsuite/ChangeLog:

PR target/119084
* gcc.target/loongarch/pr119084.c: New test.
gcc/config/loongarch/lasx.md
gcc/config/loongarch/loongarch.cc
gcc/config/loongarch/lsx.md
gcc/config/loongarch/simd.md
gcc/testsuite/gcc.target/loongarch/pr119084.c [new file with mode: 0644]